lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 18 Jul 2019 11:54:15 +0530
From:   gokulsri@...eaurora.org
To:     Stephen Boyd <sboyd@...nel.org>
Cc:     agross@...nel.org, bjorn.andersson@...aro.org,
        david.brown@...aro.org, devicetree@...r.kernel.org,
        jassisinghbrar@...il.com, linux-arm-msm@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-remoteproc@...r.kernel.org, mark.rutland@....com,
        mturquette@...libre.com, ohad@...ery.com, robh+dt@...nel.org,
        sricharan@...eaurora.org
Subject: Re: [PATCH 12/12] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC

On 2019-07-18 01:43, Stephen Boyd wrote:
> Quoting Gokul Sriram Palanisamy (2019-07-11 08:41:08)
>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
>> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> index 6a61a63..c24e3f6 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> @@ -10,6 +10,22 @@
>>         model = "Qualcomm Technologies, Inc. IPQ8074";
>>         compatible = "qcom,ipq8074";
>> 
>> +       reserved-memory {
>> +               #address-cells = <2>;
>> +               #size-cells = <2>;
>> +               ranges;
>> +
>> +               smem_region:smem@...00000 {
> 
> Put a space between the colon and the node name. Also, just call it
> memory@...00000.

  ok, will fix.
> 
> 		smem_region: memory@...00000 {
> 
>> +                       no-map;
>> +                       reg = <0x0 0x4ab00000 0x0 0x00100000>;
>> +               };
>> +
>> +               q6_region: q6@...00000 {
> 
> memory@

  ok, will fix.
> 
>> +                       no-map;
>> +                       reg = <0x0 0x4b000000 0x0 0x05f00000>;
>> +               };
>> +       };
>> +
>>         firmware {
>>                 scm {
>>                         compatible = "qcom,scm-ipq8074", "qcom,scm";
>> @@ -431,6 +447,115 @@
>>                                       "axi_m_sticky";
>>                         status = "disabled";
>>                 };
>> +               apcs: syscon@...1000 {
> 
> Add a newline between nodes please.

  ok, will fix.
> 
>> +                       compatible = "syscon";
>> +                       reg = <0x0B111000 0x1000>;
>> +               };
>> +
>> +               wcss: smp2p-wcss {
> 
> This node should be outside the soc node because it doesn't have a reg
> property

  ok, will fix.
> 
>> +                       compatible = "qcom,smp2p";
>> +                       qcom,smem = <435>, <428>;
>> +
>> +                       interrupt-parent = <&intc>;
>> +                       interrupts = <0 322 1>;
>> +
>> +                       qcom,ipc = <&apcs 8 9>;
>> +
>> +                       qcom,local-pid = <0>;
>> +                       qcom,remote-pid = <1>;
>> +
>> +                       wcss_smp2p_out: master-kernel {
>> +                               qcom,entry-name = "master-kernel";
>> +                               qcom,smp2p-feature-ssr-ack;
>> +                               #qcom,smem-state-cells = <1>;
>> +                       };
>> +
>> +                       wcss_smp2p_in: slave-kernel {
>> +                               qcom,entry-name = "slave-kernel";
>> +
>> +                               interrupt-controller;
>> +                               #interrupt-cells = <2>;
>> +                       };
>> +               };
>> +
>> +               tcsr_q6_block: syscon@...5000 {
> 
> Do you really need _block in these aliases?

  ok, will fix it to "tcsr_q6"
> 
>> +                       compatible = "syscon";
>> +                       reg = <0x1945000 0xE000>;
>> +               };
>> +
>> +               tcsr_mutex_block: syscon@...d000 {
>> +                       compatible = "syscon";
>> +                       reg = <0x1905000 0x8000>;
>> +               };
>> +
>> +               tcsr_mutex: hwlock@...d000 {
>> +                       compatible = "qcom,tcsr-mutex";
>> +                       syscon = <&tcsr_mutex_block 0 0x80>;
>> +                       #hwlock-cells = <1>;
>> +               };
>> +
>> +               smem: qcom,smem@...00000 {
> 
> lowercase please. And just 'smem' I guess.

  ok, will fix.
> 
>> +                       compatible = "qcom,smem";
>> +                       memory-region = <&smem_region>;
>> +                       hwlocks = <&tcsr_mutex 0>;
>> +               };
>> +
>> +               apcs_glb: mailbox@...1000 {
>> +                       compatible = "qcom,ipq8074-apcs-apps-global";
>> +                       reg = <0xb111000 0x1000>;
> 
> These addresses should be padded out to 8 digits for the address part
> (not the size).

  ok, will fix.
> 
>> +
>> +                       #mbox-cells = <1>;
>> +               };
>> +
>> +               q6v5_wcss: q6v5_wcss@...0000 {
> 
> lowercase.

  ok, will fix.
> 
>> +                       compatible = "qcom,ipq8074-wcss-pil";
>> +                       reg = <0xCD00000 0x4040>,
>> +                             <0x4AB000 0x20>;

Regards,
  Gokul

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ