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Message-ID: <4c0ad46b-6790-b154-9c55-587b87dc204e@samsung.com>
Date: Thu, 18 Jul 2019 16:02:11 +0200
From: Sylwester Nawrocki <s.nawrocki@...sung.com>
To: Rob Herring <robh@...nel.org>
Cc: krzk@...nel.org, kgene@...nel.org, mark.rutland@....com,
cw00.choi@...sung.com, myungjoo.ham@...sung.com,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
pankaj.dubey@...sung.com, b.zolnierkie@...sung.com,
m.szyprowski@...sung.com
Subject: Re: [PATCH RFC 3/8] dt-bindings: exynos: Add ASV tables binding
documentation
On 4/29/19 19:23, Rob Herring wrote:
> We already have OPP tables defined for QCom CPUs to do speed bining, and
> I just reviewed something from Allwinner for similar purposes. We can't
> have each vendor doing their own thing here.
I tried that opp-supported-hw bitmask approach but number of OPP DT nodes
was rather high, around 200 per CPU cluster. So I moved OPP tables to
the driver. I'm going to post next version of the patch set soon.
--
Regards,
Sylwester
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