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Message-ID: <20190719142113.ixalfoikevwnhvaq@ca-dmjordan1.us.oracle.com>
Date: Fri, 19 Jul 2019 10:21:13 -0400
From: Daniel Jordan <daniel.m.jordan@...cle.com>
To: Herbert Xu <herbert@...dor.apana.org.au>
Cc: Daniel Jordan <daniel.m.jordan@...cle.com>,
Steffen Klassert <steffen.klassert@...unet.com>,
Andrea Parri <andrea.parri@...rulasolutions.com>,
Boqun Feng <boqun.feng@...il.com>,
"Paul E . McKenney" <paulmck@...ux.ibm.com>,
Peter Zijlstra <peterz@...radead.org>,
linux-arch@...r.kernel.org, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org,
Mathias Krause <minipli@...glemail.com>
Subject: Re: [PATCH] padata: Replace delayed timer with immediate workqueue
in padata_reorder
On Thu, Jul 18, 2019 at 10:49:50PM +0800, Herbert Xu wrote:
> On Thu, Jul 18, 2019 at 10:25:15AM -0400, Daniel Jordan wrote:
> >
> > Which memory barrier do you mean? I think you're referring to the one that
> > atomic_inc might provide? If so, the memory model maintainers can correct me
> > here, but my understanding is that RMW atomic ops that don't return values are
> > unordered, so switching the lines has no effect.
> >
> > Besides, the smp_mb__after_atomic is what orders the list insertion with the
> > trylock of pd->lock.
>
> The primitive smp_mb__after_atomic only provides a barrier when
> used in conjunction with atomic_inc (and similar atomic ops).
>
> The actual barrier may either be in smp_mb__after_atomic or the
> atomic op itself (which is the case on x86). Since we need the
> barrier to occur after the list insertion we must move both of
> these after the list_add_tail.
Yes, my mistake! Thanks for clarifying that.
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