linux-kernel - RE: [PATCH v2] ARC: [plat-hsdk]: allow to switch between AXI DMAC port configurations

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Message-ID: <CY4PR1201MB012020E6C3416DC9F4A5AF19A1C40@CY4PR1201MB0120.namprd12.prod.outlook.com>
Date:   Mon, 22 Jul 2019 18:42:38 +0000
From:   Alexey Brodkin <Alexey.Brodkin@...opsys.com>
To:     Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
        "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Vineet Gupta" <Vineet.Gupta1@...opsys.com>
Subject: RE: [PATCH v2] ARC: [plat-hsdk]: allow to switch between AXI DMAC
 port configurations

Hi Eugeniy,

> -----Original Message-----
> From: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
> Sent: Monday, July 22, 2019 12:32 PM
> To: linux-snps-arc@...ts.infradead.org; Vineet Gupta <vgupta@...opsys.com>
> Cc: linux-kernel@...r.kernel.org; Alexey Brodkin <abrodkin@...opsys.com>; Eugeniy Paltsev
> <Eugeniy.Paltsev@...opsys.com>
> Subject: [PATCH v2] ARC: [plat-hsdk]: allow to switch between AXI DMAC port configurations
> 
> We want to use DW AXI DMAC on HSDK board in our automated verification
> to test cache & dma kernel code changes. This is perfect candidate
> as we don't depend on any external peripherals like MMC card / USB
> storage / etc.
> To increase test coverage we want to test both options:
>  * DW AXI DMAC is connected through IOC port & dma direct ops used
>  * DW AXI DMAC is connected to DDR port & dma noncoherent ops used
> 
> Introduce 'arc_hsdk_axi_dmac_coherent' global variable which can be
> modified by debugger (same way as we patch 'ioc_enable') to switch
> between these options without recompiling the kernel.
> Depend on this value we tweak memory bridge configuration and
> "dma-coherent" DTS property of DW AXI DMAC.

Looks good to me.

Acked-by: Alexey Brodkin <abrodkin@...opsys.com>

-Thanks