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Message-ID: <alpine.DEB.2.21.9999.1907221224170.23563@viisi.sifive.com>
Date: Mon, 22 Jul 2019 12:25:17 -0700 (PDT)
From: Paul Walmsley <paul.walmsley@...ive.com>
To: Atish Patra <atish.patra@....com>
cc: linux-kernel@...r.kernel.org,
Jeremy Linton <jeremy.linton@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <anup@...infault.org>,
Catalin Marinas <catalin.marinas@....com>,
"David S. Miller" <davem@...emloft.net>,
devicetree@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Ingo Molnar <mingo@...nel.org>,
Johan Hovold <johan@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
linux-riscv@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
Morten Rasmussen <morten.rasmussen@....com>,
Otto Sabart <ottosabart@...erm.com>,
Palmer Dabbelt <palmer@...ive.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Sudeep Holla <sudeep.holla@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Will Deacon <will.deacon@....com>,
Will Deacon <will@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH v8 0/7] Unify CPU topology across ARM & RISC-V
On Fri, 12 Jul 2019, Paul Walmsley wrote:
> On Thu, 27 Jun 2019, Atish Patra wrote:
>
> > The cpu-map DT entry in ARM can describe the CPU topology in much better
> > way compared to other existing approaches. RISC-V can easily adopt this
> > binding to represent its own CPU topology. Thus, both cpu-map DT
> > binding and topology parsing code can be moved to a common location so
> > that RISC-V or any other architecture can leverage that.
> > different config for the architectures that do not support them.
>
> Once v5.3-rc1 is released, let's plan to get these patches rebased and
> reposted and into linux-next as soon as possible.
These CPU topology patches are now queued for v5.4-rc1. They should enter
linux-next shortly.
- Paul
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