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Message-Id: <ae33cb72a370d3af6319330e950cdd6cc68a007c.1563822216.git.evgenyz@gmail.com>
Date: Mon, 22 Jul 2019 21:53:04 +0200
From: Evgeny Kolesnikov <evgenyz@...il.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Evgeny Kolesnikov <evgenyz@...il.com>,
Sebastian Reichel <sre@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 4/5] power/reset: Add a restart driver for UART-based PM MCUs
This adds the restart driver for power managing
micro controller units that are connected to a board
via the UART interface.
Signed-off-by: Evgeny Kolesnikov <evgenyz@...il.com>
---
drivers/power/reset/Kconfig | 7 +
drivers/power/reset/Makefile | 1 +
drivers/power/reset/uart-restart.c | 204 +++++++++++++++++++++++++++++
3 files changed, 212 insertions(+)
create mode 100644 drivers/power/reset/uart-restart.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 02fdf45e3988..4b187af1fba6 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -223,6 +223,13 @@ config POWER_RESET_UART_POWEROFF
Power off support for boards with UART-based PM MCU
such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+config POWER_RESET_UART
+ tristate "UART-based PM MCU restart driver"
+ depends on OF_GPIO
+ help
+ Reboot support for boards with UART-based PM MCU
+ such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+
config POWER_RESET_ZX
tristate "ZTE SoCs reset driver"
depends on ARCH_ZX || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index efe8f25f463d..fa8a936d7a1a 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_POWER_RESET_SYSCON) += syscon-reboot.o
obj-$(CONFIG_POWER_RESET_SYSCON_POWEROFF) += syscon-poweroff.o
obj-$(CONFIG_POWER_RESET_RMOBILE) += rmobile-reset.o
obj-$(CONFIG_POWER_RESET_UART_POWEROFF) += uart-poweroff.o
+obj-$(CONFIG_POWER_RESET_UART) += uart-restart.o
obj-$(CONFIG_POWER_RESET_ZX) += zx-reboot.o
obj-$(CONFIG_REBOOT_MODE) += reboot-mode.o
obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
diff --git a/drivers/power/reset/uart-restart.c b/drivers/power/reset/uart-restart.c
new file mode 100644
index 000000000000..be4dcbbb826e
--- /dev/null
+++ b/drivers/power/reset/uart-restart.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Restart for boards with UART-based PM MCUs
+ * such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov <evgenyz@...il.com>
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2016 Martin Mueller <mm@...21.net>
+ * Copyright (C) 2012 Andrew Lunn <andrew@...n.ch>
+ * Copyright (C) 2009 Martin Michlmayr <tbm@...ius.com>
+ * Copyright (C) 2008 Byron Bradley <byron.bbradley@...il.com>
+ *
+ */
+
+#include <linux/reboot.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/serial_reg.h>
+#include <linux/kallsyms.h>
+#include <linux/of.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#ifdef CONFIG_ARM
+#include <asm/system_misc.h>
+#endif
+
+#define UART_REG(b, x) (b + ((UART_##x) << 2))
+
+
+struct uart_restart {
+ struct notifier_block restart_handler;
+ const u8 *cmd;
+ int cmd_len;
+ void __iomem *base;
+ unsigned int divisor;
+ u32 byte_delay_ms;
+ u32 timeout_ms;
+ void *pm_restart_org;
+};
+
+static int uart_restart_notify(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ struct uart_restart *uart_restart =
+ container_of(this, struct uart_restart, restart_handler);
+ int i;
+
+ /* Hijack UART and reset into sane state */
+ writel(0x83, UART_REG(uart_restart->base, LCR));
+ writel(uart_restart->divisor & 0xFF, UART_REG(uart_restart->base, DLL));
+ writel((uart_restart->divisor >> 8) & 0xFF, UART_REG(uart_restart->base, DLM));
+ writel(0x03, UART_REG(uart_restart->base, LCR));
+ writel(0x00, UART_REG(uart_restart->base, IER));
+ writel(0x00, UART_REG(uart_restart->base, FCR));
+ writel(0x00, UART_REG(uart_restart->base, MCR));
+
+ /* Send the command */
+ for (i = 0; i < uart_restart->cmd_len; i++) {
+ writel(uart_restart->cmd[i], UART_REG(uart_restart->base, TX));
+ mdelay(uart_restart->byte_delay_ms);
+ }
+ mdelay(uart_restart->timeout_ms);
+ WARN_ON(1);
+
+ return NOTIFY_DONE;
+}
+
+static int uart_restart_probe(struct platform_device *pdev)
+{
+ struct uart_restart *uart_restart;
+ struct resource *res;
+ void __iomem *base;
+ struct clk *clk;
+ u32 baud;
+ bool override;
+ int err;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Missing resource\n");
+ return -EINVAL;
+ }
+
+ base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (!base) {
+ dev_err(&pdev->dev, "Unable to map resource\n");
+ return -EINVAL;
+ }
+
+ /* We need to know tclk in order to calculate the UART divisor */
+ clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "Clk missing\n");
+ return PTR_ERR(clk);
+ }
+
+ uart_restart = devm_kzalloc(&pdev->dev, sizeof(*uart_restart),
+ GFP_KERNEL);
+ if (!uart_restart)
+ return -ENOMEM;
+
+ uart_restart->cmd = of_get_property(pdev->dev.of_node, "cmd",
+ &uart_restart->cmd_len);
+ if (uart_restart->cmd == NULL || uart_restart->cmd_len < 1) {
+ dev_err(&pdev->dev, "Cmd is missing or empty\n");
+ return -EINVAL;
+ }
+
+ of_property_read_u32(pdev->dev.of_node, "baud", &baud);
+ if (baud < 75 || baud > 460800) {
+ dev_err(&pdev->dev, "Baud rate is missing or invalid\n");
+ return -EINVAL;
+ }
+
+ uart_restart->restart_handler.notifier_call = uart_restart_notify;
+ uart_restart->restart_handler.priority = 129;
+ uart_restart->base = base;
+ uart_restart->divisor =
+ ((clk_get_rate(clk) + (8 * baud)) / (16 * baud));
+ uart_restart->byte_delay_ms = 5;
+ uart_restart->timeout_ms = 1000;
+ of_property_read_u32(pdev->dev.of_node, "byte-delay",
+ &uart_restart->byte_delay_ms);
+ of_property_read_u32(pdev->dev.of_node, "timeout",
+ &uart_restart->timeout_ms);
+
+ override = of_property_read_bool(pdev->dev.of_node, "override");
+
+ if (override)
+ uart_restart->restart_handler.priority = 192;
+
+ platform_set_drvdata(pdev, uart_restart);
+
+#ifdef CONFIG_ARM
+ char symname[KSYM_NAME_LEN];
+
+ if (arm_pm_restart && !override) {
+ lookup_symbol_name((ulong)arm_pm_restart, symname);
+ dev_err(&pdev->dev,
+ "The arm_pm_restart is already claimed by %s (%p) and override is false",
+ symname, arm_pm_restart);
+ return -EBUSY;
+ }
+#endif
+
+ err = register_restart_handler(&uart_restart->restart_handler);
+ if (err) {
+ dev_err(&pdev->dev,
+ "Unable to register restart handler: %d\n", err);
+ return -ENODEV;
+ }
+
+#ifdef CONFIG_ARM
+ if (arm_pm_restart && override) {
+ uart_restart->pm_restart_org = arm_pm_restart;
+ arm_pm_restart = NULL;
+ }
+#endif
+
+ return 0;
+}
+
+static int uart_restart_remove(struct platform_device *pdev)
+{
+ struct uart_restart *uart_restart = platform_get_drvdata(pdev);
+ int err;
+
+ err = unregister_restart_handler(&uart_restart->restart_handler);
+ if (err) {
+ dev_err(&pdev->dev,
+ "Unable to unregister restart handler, %d\n", err);
+ return -ENODEV;
+ }
+
+#ifdef CONFIG_ARM
+ if (arm_pm_restart == NULL && uart_restart->pm_restart_org != NULL)
+ arm_pm_restart = uart_restart->pm_restart_org;
+#endif
+
+ return 0;
+}
+
+static const struct of_device_id of_uart_restart_match[] = {
+ { .compatible = "uart-restart", },
+ {},
+};
+
+static struct platform_driver uart_restart_driver = {
+ .probe = uart_restart_probe,
+ .remove = uart_restart_remove,
+ .driver = {
+ .name = "uart_restart",
+ .of_match_table = of_uart_restart_match,
+ },
+};
+module_platform_driver(uart_restart_driver);
+
+MODULE_AUTHOR("Evgeny Kolesnikov <evgenyz@...il.com>");
+MODULE_DESCRIPTION("UART-based PM MCU restart driver");
+MODULE_LICENSE("GPL v2");
--
2.21.0
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