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Message-ID: <20190723145100.GS5447@atomide.com>
Date: Tue, 23 Jul 2019 07:51:00 -0700
From: Tony Lindgren <tony@...mide.com>
To: David Lechner <david@...hnology.com>
Cc: linux-iio@...r.kernel.org, linux-omap@...r.kernel.org,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
BenoƮt Cousson <bcousson@...libre.com>,
William Breathitt Gray <vilhelm.gray@...il.com>,
Thierry Reding <thierry.reding@...il.com>,
linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org
Subject: Re: [PATCH 3/4] ARM: dts: am33xx: Add nodes for eQEP
* David Lechner <david@...hnology.com> [190723 14:46]:
> On 7/23/19 3:42 AM, Tony Lindgren wrote:
> > * David Lechner <david@...hnology.com> [190722 15:46]:
> > > This adds new nodes for the Texas Instruments Enhanced Quadrature
> > > Encoder Pulse (eQEP) module in the PWM subsystem on AM33XX.
> > >
> > > Signed-off-by: David Lechner <david@...hnology.com>
> > > ---
> > > arch/arm/boot/dts/am33xx-l4.dtsi | 27 +++++++++++++++++++++++++++
> > > 1 file changed, 27 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
> > > index 3b1fb2ba4dff..7fdc2f61c553 100644
> > > --- a/arch/arm/boot/dts/am33xx-l4.dtsi
> > > +++ b/arch/arm/boot/dts/am33xx-l4.dtsi
> > > @@ -1908,6 +1908,15 @@
> > > status = "disabled";
> > > };
> > > + eqep0: eqep@180 {
> > > + compatible = "ti,am3352-eqep";
> > > + reg = <0x180 0x80>;
> > > + clocks = <&l4ls_gclk>;
> > > + clock-names = "fck";
> > > + interrupts = <79>;
> > > + status = "disabled";
> > > + };
> > > +
> >
> > You probably no longer need to map any clocks here as this> is now a child of the interconnect target module managed
> > by ti-sysc driver. I have not checked but probably l4ls_gclk
> > is same as clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>
> > already managed by ti-sysc. If so, then just using runtime PM
> > calls in any of the child device drivers will keep it enabled.
> >
> > If l4ls_gclk is a separate functional clock, then it still
> > needs to be managed by the child device driver directly.
>
> The clock is included so that we can get the clock rate for
> the timing aspects of the eQEP, not for power management.
>
> I chose to use the "fck" name to be consistent with the
> sibling EHRPWM and ECAP nodes that already have the same
> bindings for the same clock.
OK makes sense to me thanks.
Tony
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