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Message-ID: <20190723152144.GC1524@8bytes.org>
Date: Tue, 23 Jul 2019 17:21:44 +0200
From: "joro@...tes.org" <joro@...tes.org>
To: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>
Subject: Re: [PATCH] iommu/amd: Add support for X2APIC IOMMU interrupts
Hi Suravee,
On Tue, Jul 16, 2019 at 04:29:16AM +0000, Suthikulpanit, Suravee wrote:
> AMD IOMMU requires IntCapXT registers to be setup in order to generate
> its own interrupts (for Event Log, PPR Log, and GA Log) with 32-bit
> APIC destination ID. Without this support, AMD IOMMU MSI interrupts
> will not be routed correctly when booting the system in X2APIC mode.
>
> Cc: Joerg Roedel <joro@...tes.org>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Patch looks good to me, just a Fixes tag is missing. Can you send me
one? I will queue the patch up for v5.3 then.
Regards,
Joerg
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