linux-kernel - [PATCH] RDMA/hns: Fix build error for hip08

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190723024908.11876-1-yuehaibing@huawei.com>
Date:   Tue, 23 Jul 2019 10:49:08 +0800
From:   YueHaibing <yuehaibing@...wei.com>
To:     <oulijun@...wei.com>, <xavier.huwei@...wei.com>,
        <dledford@...hat.com>, <jgg@...pe.ca>
CC:     <linux-kernel@...r.kernel.org>, <linux-rdma@...r.kernel.org>,
        YueHaibing <yuehaibing@...wei.com>
Subject: [PATCH] RDMA/hns: Fix build error for hip08

If INFINIBAND_HNS_HIP08 is selected and HNS3 is m,
but INFINIBAND_HNS is y, building fails:

drivers/infiniband/hw/hns/hns_roce_hw_v2.o: In function `hns_roce_hw_v2_exit':
hns_roce_hw_v2.c:(.exit.text+0xd): undefined reference to `hnae3_unregister_client'
drivers/infiniband/hw/hns/hns_roce_hw_v2.o: In function `hns_roce_hw_v2_init':
hns_roce_hw_v2.c:(.init.text+0xd): undefined reference to `hnae3_register_client'

Reported-by: Hulk Robot <hulkci@...wei.com>
Fixes: dd74282df573 ("RDMA/hns: Initialize the PCI device for hip08 RoCE")
Signed-off-by: YueHaibing <yuehaibing@...wei.com>
---
 drivers/infiniband/hw/hns/Kconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/hns/Kconfig b/drivers/infiniband/hw/hns/Kconfig
index b59da5d..4371c80 100644
--- a/drivers/infiniband/hw/hns/Kconfig
+++ b/drivers/infiniband/hw/hns/Kconfig
@@ -23,7 +23,8 @@ config INFINIBAND_HNS_HIP06
 
 config INFINIBAND_HNS_HIP08
 	bool "Hisilicon Hip08 Family RoCE support"
-	depends on INFINIBAND_HNS && PCI && HNS3
+	depends on INFINIBAND_HNS && (INFINIBAND_HNS = HNS3)
+	depends on PCI
 	---help---
 	  RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip08 SoC.
 	  The RoCE engine is a PCI device.
-- 
2.7.4