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Message-Id: <20190724191744.834829288@linuxfoundation.org>
Date: Wed, 24 Jul 2019 21:17:08 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Marc Zyngier <marc.zyngier@....com>,
Mark Rutland <mark.rutland@....com>,
James Morse <james.morse@....com>,
Will Deacon <will.deacon@....com>,
Julien Thierry <julien.thierry@....com>,
Catalin Marinas <catalin.marinas@....com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.2 137/413] arm64: Do not enable IRQs for ct_user_exit
[ Upstream commit 9034f6251572a4744597c51dea5ab73a55f2b938 ]
For el0_dbg and el0_error, DAIF bits get explicitly cleared before
calling ct_user_exit.
When context tracking is disabled, DAIF gets set (almost) immediately
after. When context tracking is enabled, among the first things done
is disabling IRQs.
What is actually needed is:
- PSR.D = 0 so the system can be debugged (should be already the case)
- PSR.A = 0 so async error can be handled during context tracking
Do not clear PSR.I in those two locations.
Reviewed-by: Marc Zyngier <marc.zyngier@....com>
Acked-by: Mark Rutland <mark.rutland@....com>
Reviewed-by: James Morse <james.morse@....com>
Cc: Will Deacon <will.deacon@....com>
Signed-off-by: Julien Thierry <julien.thierry@....com>
Signed-off-by: Catalin Marinas <catalin.marinas@....com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm64/kernel/entry.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 2df8d0a1d980..dbe467686332 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -859,7 +859,7 @@ el0_dbg:
mov x1, x25
mov x2, sp
bl do_debug_exception
- enable_daif
+ enable_da_f
ct_user_exit
b ret_to_user
el0_inv:
@@ -911,7 +911,7 @@ el0_error_naked:
enable_dbg
mov x0, sp
bl do_serror
- enable_daif
+ enable_da_f
ct_user_exit
b ret_to_user
ENDPROC(el0_error)
--
2.20.1
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