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Message-ID: <201907241012.UfFNHgLS%lkp@intel.com>
Date:   Wed, 24 Jul 2019 10:54:35 +0800
From:   kbuild test robot <lkp@...el.com>
To:     Max Filippov <jcmvbkbc@...il.com>
Cc:     kbuild-all@...org, linux-kernel@...r.kernel.org
Subject: arch/xtensa/kernel/coprocessor.S:128: Error: literal pool location
 required for text-section-literals; specify with .literal_position

Hi Max,

First bad commit (maybe != root cause):

tree:   https://kernel.googlesource.com/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   ad5e427e0f6b702e52c11d1f7b2b7be3bac7de82
commit: d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a xtensa: abstract 'entry' and 'retw' in assembly code
date:   2 weeks ago
config: xtensa-audio_kc705_defconfig (attached as .config)
compiler: xtensa-test_kc705_hifi-linux-gcc (GCC) 7.4.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a
        # save the attached .config to linux build tree
        GCC_VERSION=7.4.0 make.cross ARCH=xtensa 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@...el.com>

All errors (new ones prefixed by >>):

   arch/xtensa/kernel/coprocessor.S: Assembler messages:
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_ovf_sar'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_bithead'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_ts_fts_bu_bp'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_cw_sd_no'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_cbegin0'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'rur.ae_cend0'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_s64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_salign64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_salign64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_salign64.i'
   arch/xtensa/kernel/coprocessor.S:69: Error: unknown opcode or format name 'ae_salign64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_ovf_sar'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_bithead'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_ts_fts_bu_bp'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_cw_sd_no'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_cbegin0'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'wur.ae_cend0'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_l64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_lalign64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_lalign64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_lalign64.i'
   arch/xtensa/kernel/coprocessor.S:78: Error: unknown opcode or format name 'ae_lalign64.i'
   arch/xtensa/kernel/coprocessor.S:125: Error: unknown opcode or format name 'abi_entry'
>> arch/xtensa/kernel/coprocessor.S:128: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:137: Error: unknown opcode or format name 'abi_ret'
   arch/xtensa/kernel/coprocessor.S:158: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:199: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:216: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:217: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:228: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:238: Error: literal pool location required for text-section-literals; specify with .literal_position
   arch/xtensa/kernel/coprocessor.S:239: Error: literal pool location required for text-section-literals; specify with .literal_position
>> arch/xtensa/kernel/coprocessor.S:128: Error: literal pool location required for text-section-literals; specify with .literal_position

vim +128 arch/xtensa/kernel/coprocessor.S

5a0015d62668e64 Chris Zankel 2005-06-23   30  
c658eac628aa8df Chris Zankel 2008-02-12   31  /*
c658eac628aa8df Chris Zankel 2008-02-12   32   * Macros for lazy context switch. 
c658eac628aa8df Chris Zankel 2008-02-12   33   */
5a0015d62668e64 Chris Zankel 2005-06-23   34  
c658eac628aa8df Chris Zankel 2008-02-12   35  #define SAVE_CP_REGS(x)							\
5dacbbef3d29598 Max Filippov 2018-11-25   36  	.if XTENSA_HAVE_COPROCESSOR(x);					\
c658eac628aa8df Chris Zankel 2008-02-12   37  		.align 4;						\
c658eac628aa8df Chris Zankel 2008-02-12   38  	.Lsave_cp_regs_cp##x:						\
c658eac628aa8df Chris Zankel 2008-02-12   39  		xchal_cp##x##_store a2 a4 a5 a6 a7;			\
5dacbbef3d29598 Max Filippov 2018-11-25   40  		jx	a0;						\
5dacbbef3d29598 Max Filippov 2018-11-25   41  	.endif
5a0015d62668e64 Chris Zankel 2005-06-23   42  
c658eac628aa8df Chris Zankel 2008-02-12   43  #define SAVE_CP_REGS_TAB(x)						\
c658eac628aa8df Chris Zankel 2008-02-12   44  	.if XTENSA_HAVE_COPROCESSOR(x);					\
5dacbbef3d29598 Max Filippov 2018-11-25   45  		.long .Lsave_cp_regs_cp##x;				\
c658eac628aa8df Chris Zankel 2008-02-12   46  	.else;								\
c658eac628aa8df Chris Zankel 2008-02-12   47  		.long 0;						\
c658eac628aa8df Chris Zankel 2008-02-12   48  	.endif;								\
c658eac628aa8df Chris Zankel 2008-02-12   49  	.long THREAD_XTREGS_CP##x
5a0015d62668e64 Chris Zankel 2005-06-23   50  
5a0015d62668e64 Chris Zankel 2005-06-23   51  
c658eac628aa8df Chris Zankel 2008-02-12   52  #define LOAD_CP_REGS(x)							\
5dacbbef3d29598 Max Filippov 2018-11-25   53  	.if XTENSA_HAVE_COPROCESSOR(x);					\
c658eac628aa8df Chris Zankel 2008-02-12   54  		.align 4;						\
c658eac628aa8df Chris Zankel 2008-02-12   55  	.Lload_cp_regs_cp##x:						\
c658eac628aa8df Chris Zankel 2008-02-12   56  		xchal_cp##x##_load a2 a4 a5 a6 a7;			\
5dacbbef3d29598 Max Filippov 2018-11-25   57  		jx	a0;						\
5dacbbef3d29598 Max Filippov 2018-11-25   58  	.endif
5a0015d62668e64 Chris Zankel 2005-06-23   59  
c658eac628aa8df Chris Zankel 2008-02-12   60  #define LOAD_CP_REGS_TAB(x)						\
c658eac628aa8df Chris Zankel 2008-02-12   61  	.if XTENSA_HAVE_COPROCESSOR(x);					\
5dacbbef3d29598 Max Filippov 2018-11-25   62  		.long .Lload_cp_regs_cp##x;				\
c658eac628aa8df Chris Zankel 2008-02-12   63  	.else;								\
c658eac628aa8df Chris Zankel 2008-02-12   64  		.long 0;						\
c658eac628aa8df Chris Zankel 2008-02-12   65  	.endif;								\
c658eac628aa8df Chris Zankel 2008-02-12   66  	.long THREAD_XTREGS_CP##x
5a0015d62668e64 Chris Zankel 2005-06-23   67  
c658eac628aa8df Chris Zankel 2008-02-12   68  	SAVE_CP_REGS(0)
c658eac628aa8df Chris Zankel 2008-02-12   69  	SAVE_CP_REGS(1)
c658eac628aa8df Chris Zankel 2008-02-12   70  	SAVE_CP_REGS(2)
c658eac628aa8df Chris Zankel 2008-02-12   71  	SAVE_CP_REGS(3)
c658eac628aa8df Chris Zankel 2008-02-12   72  	SAVE_CP_REGS(4)
c658eac628aa8df Chris Zankel 2008-02-12   73  	SAVE_CP_REGS(5)
c658eac628aa8df Chris Zankel 2008-02-12   74  	SAVE_CP_REGS(6)
c658eac628aa8df Chris Zankel 2008-02-12   75  	SAVE_CP_REGS(7)
5a0015d62668e64 Chris Zankel 2005-06-23   76  
c658eac628aa8df Chris Zankel 2008-02-12   77  	LOAD_CP_REGS(0)
c658eac628aa8df Chris Zankel 2008-02-12  @78  	LOAD_CP_REGS(1)
c658eac628aa8df Chris Zankel 2008-02-12   79  	LOAD_CP_REGS(2)
c658eac628aa8df Chris Zankel 2008-02-12   80  	LOAD_CP_REGS(3)
c658eac628aa8df Chris Zankel 2008-02-12   81  	LOAD_CP_REGS(4)
c658eac628aa8df Chris Zankel 2008-02-12   82  	LOAD_CP_REGS(5)
c658eac628aa8df Chris Zankel 2008-02-12   83  	LOAD_CP_REGS(6)
c658eac628aa8df Chris Zankel 2008-02-12   84  	LOAD_CP_REGS(7)
5a0015d62668e64 Chris Zankel 2005-06-23   85  
5dacbbef3d29598 Max Filippov 2018-11-25   86  	.section ".rodata", "a"
c658eac628aa8df Chris Zankel 2008-02-12   87  	.align 4
c658eac628aa8df Chris Zankel 2008-02-12   88  .Lsave_cp_regs_jump_table:
c658eac628aa8df Chris Zankel 2008-02-12   89  	SAVE_CP_REGS_TAB(0)
c658eac628aa8df Chris Zankel 2008-02-12   90  	SAVE_CP_REGS_TAB(1)
c658eac628aa8df Chris Zankel 2008-02-12   91  	SAVE_CP_REGS_TAB(2)
c658eac628aa8df Chris Zankel 2008-02-12   92  	SAVE_CP_REGS_TAB(3)
c658eac628aa8df Chris Zankel 2008-02-12   93  	SAVE_CP_REGS_TAB(4)
c658eac628aa8df Chris Zankel 2008-02-12   94  	SAVE_CP_REGS_TAB(5)
c658eac628aa8df Chris Zankel 2008-02-12   95  	SAVE_CP_REGS_TAB(6)
c658eac628aa8df Chris Zankel 2008-02-12   96  	SAVE_CP_REGS_TAB(7)
5a0015d62668e64 Chris Zankel 2005-06-23   97  
c658eac628aa8df Chris Zankel 2008-02-12   98  .Lload_cp_regs_jump_table:
c658eac628aa8df Chris Zankel 2008-02-12   99  	LOAD_CP_REGS_TAB(0)
c658eac628aa8df Chris Zankel 2008-02-12  100  	LOAD_CP_REGS_TAB(1)
c658eac628aa8df Chris Zankel 2008-02-12  101  	LOAD_CP_REGS_TAB(2)
c658eac628aa8df Chris Zankel 2008-02-12  102  	LOAD_CP_REGS_TAB(3)
c658eac628aa8df Chris Zankel 2008-02-12  103  	LOAD_CP_REGS_TAB(4)
c658eac628aa8df Chris Zankel 2008-02-12  104  	LOAD_CP_REGS_TAB(5)
c658eac628aa8df Chris Zankel 2008-02-12  105  	LOAD_CP_REGS_TAB(6)
c658eac628aa8df Chris Zankel 2008-02-12  106  	LOAD_CP_REGS_TAB(7)
5a0015d62668e64 Chris Zankel 2005-06-23  107  
5dacbbef3d29598 Max Filippov 2018-11-25  108  	.previous
5dacbbef3d29598 Max Filippov 2018-11-25  109  
c658eac628aa8df Chris Zankel 2008-02-12  110  /*
3ffc2df9c76d3e1 Max Filippov 2018-11-26  111   * coprocessor_flush(struct thread_info*, index)
c658eac628aa8df Chris Zankel 2008-02-12  112   *                             a2        a3
c658eac628aa8df Chris Zankel 2008-02-12  113   *
3ffc2df9c76d3e1 Max Filippov 2018-11-26  114   * Save coprocessor registers for coprocessor 'index'.
c658eac628aa8df Chris Zankel 2008-02-12  115   * The register values are saved to or loaded from the coprocessor area 
c658eac628aa8df Chris Zankel 2008-02-12  116   * inside the task_info structure.
c658eac628aa8df Chris Zankel 2008-02-12  117   *
3ffc2df9c76d3e1 Max Filippov 2018-11-26  118   * Note that this function doesn't update the coprocessor_owner information!
c658eac628aa8df Chris Zankel 2008-02-12  119   *
c658eac628aa8df Chris Zankel 2008-02-12  120   */
c658eac628aa8df Chris Zankel 2008-02-12  121  
c658eac628aa8df Chris Zankel 2008-02-12  122  ENTRY(coprocessor_flush)
d1538c4675f37d0 Chris Zankel 2012-11-16  123  
d6d5f19e21d98c0 Max Filippov 2019-05-12  124  	/* reserve 4 bytes on stack to save a0 */
d6d5f19e21d98c0 Max Filippov 2019-05-12  125  	abi_entry(4)
d6d5f19e21d98c0 Max Filippov 2019-05-12  126  
c658eac628aa8df Chris Zankel 2008-02-12  127  	s32i	a0, a1, 0
c658eac628aa8df Chris Zankel 2008-02-12 @128  	movi	a0, .Lsave_cp_regs_jump_table
c658eac628aa8df Chris Zankel 2008-02-12  129  	addx8	a3, a3, a0
c658eac628aa8df Chris Zankel 2008-02-12  130  	l32i	a4, a3, 4
c658eac628aa8df Chris Zankel 2008-02-12  131  	l32i	a3, a3, 0
c658eac628aa8df Chris Zankel 2008-02-12  132  	add	a2, a2, a4
c658eac628aa8df Chris Zankel 2008-02-12  133  	beqz	a3, 1f
5dacbbef3d29598 Max Filippov 2018-11-25  134  	callx0	a3
c658eac628aa8df Chris Zankel 2008-02-12  135  1:	l32i	a0, a1, 0
d6d5f19e21d98c0 Max Filippov 2019-05-12  136  
d6d5f19e21d98c0 Max Filippov 2019-05-12  137  	abi_ret(4)
5a0015d62668e64 Chris Zankel 2005-06-23  138  
d1538c4675f37d0 Chris Zankel 2012-11-16  139  ENDPROC(coprocessor_flush)
d1538c4675f37d0 Chris Zankel 2012-11-16  140  
5a0015d62668e64 Chris Zankel 2005-06-23  141  /*
c658eac628aa8df Chris Zankel 2008-02-12  142   * Entry condition:
5a0015d62668e64 Chris Zankel 2005-06-23  143   *
c658eac628aa8df Chris Zankel 2008-02-12  144   *   a0:	trashed, original value saved on stack (PT_AREG0)
c658eac628aa8df Chris Zankel 2008-02-12  145   *   a1:	a1
c658eac628aa8df Chris Zankel 2008-02-12  146   *   a2:	new stack pointer, original in DEPC
99d5040ebc3cccc Max Filippov 2013-07-03  147   *   a3:	a3
c658eac628aa8df Chris Zankel 2008-02-12  148   *   depc:	a2, original value saved on stack (PT_DEPC)
99d5040ebc3cccc Max Filippov 2013-07-03  149   *   excsave_1:	dispatch table
5a0015d62668e64 Chris Zankel 2005-06-23  150   *
c658eac628aa8df Chris Zankel 2008-02-12  151   *   PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
c658eac628aa8df Chris Zankel 2008-02-12  152   *	     <  VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
5a0015d62668e64 Chris Zankel 2005-06-23  153   */
5a0015d62668e64 Chris Zankel 2005-06-23  154  
c658eac628aa8df Chris Zankel 2008-02-12  155  ENTRY(fast_coprocessor_double)
d1538c4675f37d0 Chris Zankel 2012-11-16  156  
bc5378fcba97431 Max Filippov 2012-10-15  157  	wsr	a0, excsave1
2da03d4114b2587 Max Filippov 2017-12-09  158  	call0	unrecoverable_exception
c658eac628aa8df Chris Zankel 2008-02-12  159  
d1538c4675f37d0 Chris Zankel 2012-11-16  160  ENDPROC(fast_coprocessor_double)
c658eac628aa8df Chris Zankel 2008-02-12  161  
c658eac628aa8df Chris Zankel 2008-02-12  162  ENTRY(fast_coprocessor)
c658eac628aa8df Chris Zankel 2008-02-12  163  
c658eac628aa8df Chris Zankel 2008-02-12  164  	/* Save remaining registers a1-a3 and SAR */
c658eac628aa8df Chris Zankel 2008-02-12  165  
c658eac628aa8df Chris Zankel 2008-02-12  166  	s32i	a3, a2, PT_AREG3
bc5378fcba97431 Max Filippov 2012-10-15  167  	rsr	a3, sar
c658eac628aa8df Chris Zankel 2008-02-12  168  	s32i	a1, a2, PT_AREG1
c658eac628aa8df Chris Zankel 2008-02-12  169  	s32i	a3, a2, PT_SAR
c658eac628aa8df Chris Zankel 2008-02-12  170  	mov	a1, a2
bc5378fcba97431 Max Filippov 2012-10-15  171  	rsr	a2, depc
c658eac628aa8df Chris Zankel 2008-02-12  172  	s32i	a2, a1, PT_AREG2
5a0015d62668e64 Chris Zankel 2005-06-23  173  
5a0015d62668e64 Chris Zankel 2005-06-23  174  	/*
c658eac628aa8df Chris Zankel 2008-02-12  175  	 * The hal macros require up to 4 temporary registers. We use a3..a6.
5a0015d62668e64 Chris Zankel 2005-06-23  176  	 */
5a0015d62668e64 Chris Zankel 2005-06-23  177  
c658eac628aa8df Chris Zankel 2008-02-12  178  	s32i	a4, a1, PT_AREG4
c658eac628aa8df Chris Zankel 2008-02-12  179  	s32i	a5, a1, PT_AREG5
c658eac628aa8df Chris Zankel 2008-02-12  180  	s32i	a6, a1, PT_AREG6
c658eac628aa8df Chris Zankel 2008-02-12  181  
c658eac628aa8df Chris Zankel 2008-02-12  182  	/* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */
c658eac628aa8df Chris Zankel 2008-02-12  183  
bc5378fcba97431 Max Filippov 2012-10-15  184  	rsr	a3, exccause
c658eac628aa8df Chris Zankel 2008-02-12  185  	addi	a3, a3, -EXCCAUSE_COPROCESSOR0_DISABLED
c658eac628aa8df Chris Zankel 2008-02-12  186  
c658eac628aa8df Chris Zankel 2008-02-12  187  	/* Set corresponding CPENABLE bit -> (sar:cp-index, a3: 1<<cp-index)*/
c658eac628aa8df Chris Zankel 2008-02-12  188  
c658eac628aa8df Chris Zankel 2008-02-12  189  	ssl	a3			# SAR: 32 - coprocessor_number
c658eac628aa8df Chris Zankel 2008-02-12  190  	movi	a2, 1
bc5378fcba97431 Max Filippov 2012-10-15  191  	rsr	a0, cpenable
c658eac628aa8df Chris Zankel 2008-02-12  192  	sll	a2, a2
c658eac628aa8df Chris Zankel 2008-02-12  193  	or	a0, a0, a2
bc5378fcba97431 Max Filippov 2012-10-15  194  	wsr	a0, cpenable
c658eac628aa8df Chris Zankel 2008-02-12  195  	rsync
c658eac628aa8df Chris Zankel 2008-02-12  196  
c658eac628aa8df Chris Zankel 2008-02-12  197  	/* Retrieve previous owner. (a3 still holds CP number) */
c658eac628aa8df Chris Zankel 2008-02-12  198  
c658eac628aa8df Chris Zankel 2008-02-12  199  	movi	a0, coprocessor_owner	# list of owners
c658eac628aa8df Chris Zankel 2008-02-12  200  	addx4	a0, a3, a0		# entry for CP
c658eac628aa8df Chris Zankel 2008-02-12  201  	l32i	a4, a0, 0
c658eac628aa8df Chris Zankel 2008-02-12  202  
c658eac628aa8df Chris Zankel 2008-02-12  203  	beqz	a4, 1f			# skip 'save' if no previous owner
c658eac628aa8df Chris Zankel 2008-02-12  204  
c658eac628aa8df Chris Zankel 2008-02-12  205  	/* Disable coprocessor for previous owner. (a2 = 1 << CP number) */
c658eac628aa8df Chris Zankel 2008-02-12  206  
c658eac628aa8df Chris Zankel 2008-02-12  207  	l32i	a5, a4, THREAD_CPENABLE
c658eac628aa8df Chris Zankel 2008-02-12  208  	xor	a5, a5, a2		# (1 << cp-id) still in a2
c658eac628aa8df Chris Zankel 2008-02-12  209  	s32i	a5, a4, THREAD_CPENABLE
c658eac628aa8df Chris Zankel 2008-02-12  210  
c658eac628aa8df Chris Zankel 2008-02-12  211  	/*
c658eac628aa8df Chris Zankel 2008-02-12  212  	 * Get context save area and 'call' save routine. 
c658eac628aa8df Chris Zankel 2008-02-12  213  	 * (a4 still holds previous owner (thread_info), a3 CP number)
c658eac628aa8df Chris Zankel 2008-02-12  214  	 */
c658eac628aa8df Chris Zankel 2008-02-12  215  
c658eac628aa8df Chris Zankel 2008-02-12  216  	movi	a5, .Lsave_cp_regs_jump_table
c658eac628aa8df Chris Zankel 2008-02-12  217  	movi	a0, 2f			# a0: 'return' address
c658eac628aa8df Chris Zankel 2008-02-12  218  	addx8	a3, a3, a5		# a3: coprocessor number
c658eac628aa8df Chris Zankel 2008-02-12  219  	l32i	a2, a3, 4		# a2: xtregs offset
5dacbbef3d29598 Max Filippov 2018-11-25  220  	l32i	a3, a3, 0		# a3: jump address
c658eac628aa8df Chris Zankel 2008-02-12  221  	add	a2, a2, a4
5dacbbef3d29598 Max Filippov 2018-11-25  222  	jx	a3
c658eac628aa8df Chris Zankel 2008-02-12  223  
c658eac628aa8df Chris Zankel 2008-02-12  224  	/* Note that only a0 and a1 were preserved. */
c658eac628aa8df Chris Zankel 2008-02-12  225  
bc5378fcba97431 Max Filippov 2012-10-15  226  2:	rsr	a3, exccause
c658eac628aa8df Chris Zankel 2008-02-12  227  	addi	a3, a3, -EXCCAUSE_COPROCESSOR0_DISABLED
c658eac628aa8df Chris Zankel 2008-02-12  228  	movi	a0, coprocessor_owner
c658eac628aa8df Chris Zankel 2008-02-12  229  	addx4	a0, a3, a0
c658eac628aa8df Chris Zankel 2008-02-12  230  
c658eac628aa8df Chris Zankel 2008-02-12  231  	/* Set new 'owner' (a0 points to the CP owner, a3 contains the CP nr) */
c658eac628aa8df Chris Zankel 2008-02-12  232  
c658eac628aa8df Chris Zankel 2008-02-12  233  1:	GET_THREAD_INFO (a4, a1)
c658eac628aa8df Chris Zankel 2008-02-12  234  	s32i	a4, a0, 0
c658eac628aa8df Chris Zankel 2008-02-12  235  
c658eac628aa8df Chris Zankel 2008-02-12  236  	/* Get context save area and 'call' load routine. */
c658eac628aa8df Chris Zankel 2008-02-12  237  
c658eac628aa8df Chris Zankel 2008-02-12  238  	movi	a5, .Lload_cp_regs_jump_table
c658eac628aa8df Chris Zankel 2008-02-12  239  	movi	a0, 1f
c658eac628aa8df Chris Zankel 2008-02-12  240  	addx8	a3, a3, a5
c658eac628aa8df Chris Zankel 2008-02-12  241  	l32i	a2, a3, 4		# a2: xtregs offset
5dacbbef3d29598 Max Filippov 2018-11-25  242  	l32i	a3, a3, 0		# a3: jump address
c658eac628aa8df Chris Zankel 2008-02-12  243  	add	a2, a2, a4
5dacbbef3d29598 Max Filippov 2018-11-25  244  	jx	a3
c658eac628aa8df Chris Zankel 2008-02-12  245  
c658eac628aa8df Chris Zankel 2008-02-12  246  	/* Restore all registers and return from exception handler. */
c658eac628aa8df Chris Zankel 2008-02-12  247  
c658eac628aa8df Chris Zankel 2008-02-12  248  1:	l32i	a6, a1, PT_AREG6
c658eac628aa8df Chris Zankel 2008-02-12  249  	l32i	a5, a1, PT_AREG5
c658eac628aa8df Chris Zankel 2008-02-12  250  	l32i	a4, a1, PT_AREG4
c658eac628aa8df Chris Zankel 2008-02-12  251  
c658eac628aa8df Chris Zankel 2008-02-12  252  	l32i	a0, a1, PT_SAR
c658eac628aa8df Chris Zankel 2008-02-12  253  	l32i	a3, a1, PT_AREG3
c658eac628aa8df Chris Zankel 2008-02-12  254  	l32i	a2, a1, PT_AREG2
bc5378fcba97431 Max Filippov 2012-10-15  255  	wsr	a0, sar
c658eac628aa8df Chris Zankel 2008-02-12  256  	l32i	a0, a1, PT_AREG0
c658eac628aa8df Chris Zankel 2008-02-12  257  	l32i	a1, a1, PT_AREG1
c658eac628aa8df Chris Zankel 2008-02-12  258  
c658eac628aa8df Chris Zankel 2008-02-12  259  	rfe
c658eac628aa8df Chris Zankel 2008-02-12  260  
d1538c4675f37d0 Chris Zankel 2012-11-16  261  ENDPROC(fast_coprocessor)
d1538c4675f37d0 Chris Zankel 2012-11-16  262  
c658eac628aa8df Chris Zankel 2008-02-12  263  	.data
d1538c4675f37d0 Chris Zankel 2012-11-16  264  
c658eac628aa8df Chris Zankel 2008-02-12  265  ENTRY(coprocessor_owner)
d1538c4675f37d0 Chris Zankel 2012-11-16  266  
c658eac628aa8df Chris Zankel 2008-02-12  267  	.fill XCHAL_CP_MAX, 4, 0
c658eac628aa8df Chris Zankel 2008-02-12  268  
d1538c4675f37d0 Chris Zankel 2012-11-16  269  END(coprocessor_owner)
d1538c4675f37d0 Chris Zankel 2012-11-16  270  
c658eac628aa8df Chris Zankel 2008-02-12  271  #endif /* XTENSA_HAVE_COPROCESSORS */

:::::: The code at line 128 was first introduced by commit
:::::: c658eac628aa8df040dfe614556d95e6da3a9ffb [XTENSA] Add support for configurable registers and coprocessors

:::::: TO: Chris Zankel <chris@...kel.net>
:::::: CC: Chris Zankel <chris@...kel.net>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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