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Message-ID: <31e9d2c6-edcd-11b8-4c4b-d51ed2d8f7b7@linaro.org>
Date: Wed, 24 Jul 2019 18:30:58 +0300
From: Georgi Djakov <georgi.djakov@...aro.org>
To: Jordan Crouse <jcrouse@...eaurora.org>,
freedreno@...ts.freedesktop.org
Cc: ilina@...eaurora.org, bjorn.andersson@...aro.org,
linux-pm@...r.kernel.org,
"Raju P.L.S.S.S.N" <rplsssn@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Andy Gross <agross@...nel.org>,
David Brown <david.brown@...aro.org>
Subject: Re: [PATCH] qcom: Add BCM vote macro to TCS header
Hi Jordan,
On 7/17/19 18:53, Jordan Crouse wrote:
> The A6XX family of Adreno GPUs use a microcontroller to control the
> GPU clock independently. The microcontroller also has the capability
> to vote for the bus but doesn't currently do so except for one initial
> vote that is hard coded [1].
>
> Currently there is no good way to construct a valid TCS command outside
> of the inner workings of the QCOM interconnect driver which is something
> that will need to be addressed for the next generation of GPU drivers.
>
> To start the process, this change moves the TCS command macros from the
> sdm845 interconnect driver into a soc specific header to make it available
> for future efforts into this area.
I agree that we should move the TCS macros into tsc.h. There is also a similar
macro in drivers/clk/qcom/clk-rpmh.c. Maybe we can replace both with a common one?
Thanks,
Georgi
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/msm/adreno/a6xx_hfi.c#n219
>
> Signed-off-by: Jordan Crouse <jcrouse@...eaurora.org>
> ---
>
> drivers/interconnect/qcom/sdm845.c | 17 -----------------
> include/soc/qcom/tcs.h | 17 +++++++++++++++++
> 2 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c
> index 4915b78..79b6f01 100644
> --- a/drivers/interconnect/qcom/sdm845.c
> +++ b/drivers/interconnect/qcom/sdm845.c
> @@ -20,23 +20,6 @@
> #include <soc/qcom/rpmh.h>
> #include <soc/qcom/tcs.h>
>
> -#define BCM_TCS_CMD_COMMIT_SHFT 30
> -#define BCM_TCS_CMD_COMMIT_MASK 0x40000000
> -#define BCM_TCS_CMD_VALID_SHFT 29
> -#define BCM_TCS_CMD_VALID_MASK 0x20000000
> -#define BCM_TCS_CMD_VOTE_X_SHFT 14
> -#define BCM_TCS_CMD_VOTE_MASK 0x3fff
> -#define BCM_TCS_CMD_VOTE_Y_SHFT 0
> -#define BCM_TCS_CMD_VOTE_Y_MASK 0xfffc000
> -
> -#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
> - (((commit) << BCM_TCS_CMD_COMMIT_SHFT) | \
> - ((valid) << BCM_TCS_CMD_VALID_SHFT) | \
> - ((cpu_to_le32(vote_x) & \
> - BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) | \
> - ((cpu_to_le32(vote_y) & \
> - BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
> -
> #define to_qcom_provider(_provider) \
> container_of(_provider, struct qcom_icc_provider, provider)
>
> diff --git a/include/soc/qcom/tcs.h b/include/soc/qcom/tcs.h
> index 262876a..6012a9e 100644
> --- a/include/soc/qcom/tcs.h
> +++ b/include/soc/qcom/tcs.h
> @@ -53,4 +53,21 @@ struct tcs_request {
> struct tcs_cmd *cmds;
> };
>
> +#define BCM_TCS_CMD_COMMIT_SHFT 30
> +#define BCM_TCS_CMD_COMMIT_MASK 0x40000000
> +#define BCM_TCS_CMD_VALID_SHFT 29
> +#define BCM_TCS_CMD_VALID_MASK 0x20000000
> +#define BCM_TCS_CMD_VOTE_X_SHFT 14
> +#define BCM_TCS_CMD_VOTE_MASK 0x3fff
> +#define BCM_TCS_CMD_VOTE_Y_SHFT 0
> +#define BCM_TCS_CMD_VOTE_Y_MASK 0xfffc000
> +
> +#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
> + (((commit) << BCM_TCS_CMD_COMMIT_SHFT) | \
> + ((valid) << BCM_TCS_CMD_VALID_SHFT) | \
> + ((cpu_to_le32(vote_x) & \
> + BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) | \
> + ((cpu_to_le32(vote_y) & \
> + BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
> +
> #endif /* __SOC_QCOM_TCS_H__ */
>
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