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Message-Id: <3b85102dfe3e358bbdde359e0a3a5f8e121fd691.1563983037.git.agx@sigxcpu.org>
Date: Wed, 24 Jul 2019 17:52:24 +0200
From: Guido Günther <agx@...xcpu.org>
To: David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Andrzej Hajda <a.hajda@...sung.com>,
Neil Armstrong <narmstrong@...libre.com>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Lee Jones <lee.jones@...aro.org>,
Guido Günther <agx@...xcpu.org>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Robert Chiras <robert.chiras@....com>
Subject: [PATCH 1/3] arm64: imx8mq: add imx8mq iomux-gpr field defines
This adds all the gpr registers and the define needed for selecting
the input source in the imx-nwl drm bridge.
Signed-off-by: Guido Günther <agx@...xcpu.org>
---
include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h | 62 ++++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h
diff --git a/include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h b/include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h
new file mode 100644
index 000000000000..62e85ffacfad
--- /dev/null
+++ b/include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2017 NXP
+ * 2019 Purism SPC
+ */
+
+#ifndef __LINUX_IMX8MQ_IOMUXC_GPR_H
+#define __LINUX_IMX8MQ_IOMUXC_GPR_H
+
+#define IOMUXC_GPR0 0x00
+#define IOMUXC_GPR1 0x04
+#define IOMUXC_GPR2 0x08
+#define IOMUXC_GPR3 0x0c
+#define IOMUXC_GPR4 0x10
+#define IOMUXC_GPR5 0x14
+#define IOMUXC_GPR6 0x18
+#define IOMUXC_GPR7 0x1c
+#define IOMUXC_GPR8 0x20
+#define IOMUXC_GPR9 0x24
+#define IOMUXC_GPR10 0x28
+#define IOMUXC_GPR11 0x2c
+#define IOMUXC_GPR12 0x30
+#define IOMUXC_GPR13 0x34
+#define IOMUXC_GPR14 0x38
+#define IOMUXC_GPR15 0x3c
+#define IOMUXC_GPR16 0x40
+#define IOMUXC_GPR17 0x44
+#define IOMUXC_GPR18 0x48
+#define IOMUXC_GPR19 0x4c
+#define IOMUXC_GPR20 0x50
+#define IOMUXC_GPR21 0x54
+#define IOMUXC_GPR22 0x58
+#define IOMUXC_GPR23 0x5c
+#define IOMUXC_GPR24 0x60
+#define IOMUXC_GPR25 0x64
+#define IOMUXC_GPR26 0x68
+#define IOMUXC_GPR27 0x6c
+#define IOMUXC_GPR28 0x70
+#define IOMUXC_GPR29 0x74
+#define IOMUXC_GPR30 0x78
+#define IOMUXC_GPR31 0x7c
+#define IOMUXC_GPR32 0x80
+#define IOMUXC_GPR33 0x84
+#define IOMUXC_GPR34 0x88
+#define IOMUXC_GPR35 0x8c
+#define IOMUXC_GPR36 0x90
+#define IOMUXC_GPR37 0x94
+#define IOMUXC_GPR38 0x98
+#define IOMUXC_GPR39 0x9c
+#define IOMUXC_GPR40 0xa0
+#define IOMUXC_GPR41 0xa4
+#define IOMUXC_GPR42 0xa8
+#define IOMUXC_GPR43 0xac
+#define IOMUXC_GPR44 0xb0
+#define IOMUXC_GPR45 0xb4
+#define IOMUXC_GPR46 0xb8
+#define IOMUXC_GPR47 0xbc
+
+/* i.MX8Mq iomux gpr register field defines */
+#define IMX8MQ_GPR13_MIPI_MUX_SEL BIT(2)
+
+#endif /* __LINUX_IMX8MQ_IOMUXC_GPR_H */
--
2.20.1
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