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Message-ID: <tip-5ea3f6fb37b79da33ac9211df336fd2b9f47c39f@git.kernel.org>
Date:   Thu, 25 Jul 2019 09:07:07 -0700
From:   tip-bot for Zhenzhong Duan <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     jgross@...e.com, jolsa@...hat.com, zhenzhong.duan@...cle.com,
        acme@...nel.org, alexander.shishkin@...ux.intel.com,
        peterz@...radead.org, torvalds@...ux-foundation.org,
        boris.ostrovsky@...cle.com, tglx@...utronix.de, hpa@...or.com,
        linux-kernel@...r.kernel.org, bp@...en8.de, mingo@...nel.org,
        namhyung@...nel.org
Subject: [tip:perf/urgent] perf/x86: Apply more accurate check on hypervisor
 platform

Commit-ID:  5ea3f6fb37b79da33ac9211df336fd2b9f47c39f
Gitweb:     https://git.kernel.org/tip/5ea3f6fb37b79da33ac9211df336fd2b9f47c39f
Author:     Zhenzhong Duan <zhenzhong.duan@...cle.com>
AuthorDate: Thu, 25 Jul 2019 10:39:26 +0800
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 25 Jul 2019 15:41:30 +0200

perf/x86: Apply more accurate check on hypervisor platform

check_msr is used to fix a bug report in guest where KVM doesn't support
LBR MSR and cause #GP.

The msr check is bypassed on real HW to workaround a false failure,
see commit d0e1a507bdc7 ("perf/x86/intel: Disable check_msr for real HW")

When running a guest with CONFIG_HYPERVISOR_GUEST not set or "nopv"
enabled, current check isn't enough and #GP could trigger.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@...cle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Boris Ostrovsky <boris.ostrovsky@...cle.com>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Juergen Gross <jgross@...e.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: https://lkml.kernel.org/r/1564022366-18293-1-git-send-email-zhenzhong.duan@oracle.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/events/intel/core.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index b35519cbc8b4..c9075fc75cb6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -20,7 +20,6 @@
 #include <asm/intel-family.h>
 #include <asm/apic.h>
 #include <asm/cpu_device_id.h>
-#include <asm/hypervisor.h>
 
 #include "../perf_event.h"
 
@@ -4053,7 +4052,7 @@ static bool check_msr(unsigned long msr, u64 mask)
 	 * Disable the check for real HW, so we don't
 	 * mess with potentionaly enabled registers:
 	 */
-	if (hypervisor_is_type(X86_HYPER_NATIVE))
+	if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
 		return true;
 
 	/*

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