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Date:   Thu, 25 Jul 2019 09:06:28 +0300
From:   Daniel Baluta <daniel.baluta@...il.com>
To:     Nicolin Chen <nicoleotsuka@...il.com>
Cc:     Daniel Baluta <daniel.baluta@....com>,
        Linux-ALSA <alsa-devel@...a-project.org>,
        Viorel Suman <viorel.suman@....com>,
        Timur Tabi <timur@...nel.org>, Xiubo Li <Xiubo.Lee@...il.com>,
        linuxppc-dev@...ts.ozlabs.org, "S.j. Wang" <shengjiu.wang@....com>,
        "Angus Ainslie (Purism)" <angus@...ea.ca>,
        Takashi Iwai <tiwai@...e.com>, Mark Brown <broonie@...nel.org>,
        dl-linux-imx <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Lucas Stach <l.stach@...gutronix.de>
Subject: Re: [alsa-devel] [PATCH 09/10] ASoC: fsl_sai: Add support for SAI new version

On Thu, Jul 25, 2019 at 2:32 AM Nicolin Chen <nicoleotsuka@...il.com> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:32PM +0300, Daniel Baluta wrote:
> > New IP version introduces Version ID and Parameter registers
> > and optionally added Timestamp feature.
> >
> > VERID and PARAM registers are placed at the top of registers
> > address space and some registers are shifted according to
> > the following table:
> >
> > Tx/Rx data registers and Tx/Rx FIFO registers keep their
> > addresses, all other registers are shifted by 8.
>
> Feels like Lucas's approach is neater. I saw that Register TMR
> at 0x60 is exceptional during your previous discussion. So can
> we apply an offset-cancellation for it exceptionally? I haven't
> checked all the registers so this would look okay to me as well
> if there are more than just Register TMR.

It is not just TMR exceptional. There are like half of the registers.
Thus: half of the registers need to be shifted and half of them
need to stay the same as in previous version of SAI.

I'm not seeing yet a neater approach. Lucas idea would somehow
work if regmap will allow some sort of translation function applied
over registers before being accessed.

Maybe Mark has some clues here?

thanks,
daniel.

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