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Message-ID: <20190725102648.13445-2-jank@cadence.com>
Date: Thu, 25 Jul 2019 11:26:46 +0100
From: Jan Kotas <jank@...ence.com>
To: <maxime.ripard@...tlin.com>, <mchehab@...nel.org>,
<robh+dt@...nel.org>, <mark.rutland@....com>
CC: <rafalc@...ence.com>, <linux-media@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Jan Kotas <jank@...ence.com>
Subject: [PATCH 1/3] media: dt-bindings: Update bindings for Cadence CSI2RX version 2.1
This patch adds a DT bindings documentation for
Cadence CSI2RX v2.1 controller.
Signed-off-by: Jan Kotas <jank@...ence.com>
---
Documentation/devicetree/bindings/media/cdns,csi2rx.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt
index 6b02a0657..a35bb0aed 100644
--- a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt
+++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt
@@ -5,7 +5,9 @@ The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
lanes in input, and 4 different pixel streams in output.
Required properties:
- - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible
+ - compatible: must be set to "cdns,csi2rx" or "cdns,csi2rx-1.3"
+ for version 1.3 of the controller, "cdns,csi2rx-2.1" for v2.1
+ and an SoC-specific compatible
- reg: base address and size of the memory mapped region
- clocks: phandles to the clocks driving the controller
- clock-names: must contain:
--
2.15.0
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