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Message-ID: <20190725132232.GQ20882@gate.crashing.org>
Date:   Thu, 25 Jul 2019 08:22:32 -0500
From:   Segher Boessenkool <segher@...nel.crashing.org>
To:     Michael Ellerman <mpe@...erman.id.au>
Cc:     Nathan Chancellor <natechancellor@...il.com>,
        Christophe Leroy <christophe.leroy@....fr>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        clang-built-linux@...glegroups.com
Subject: Re: [PATCH v2] powerpc: slightly improve cache helpers

On Tue, Jul 23, 2019 at 09:21:53AM +1000, Michael Ellerman wrote:
> Segher Boessenkool <segher@...nel.crashing.org> writes:
> >> can use both RA and RB to compute the address, rather than us forcing RA
> >> to 0.
> >> 
> >> But at least with my compiler here (GCC 8 vintage) I don't actually see
> >> GCC ever using both GPRs even with the patch. Or at least, there's no
> >> difference before/after the patch as far as I can see.
> >
> > The benefit is small, certainly.
> 
> Zero is small, but I guess some things are smaller? :P

Heh.  0 out of 12 is small.

It actually is quite easy to do trigger the macros to generate two-reg
dcb* instructions; but all the places where that is especially useful,
in loops for example, already use hand-written assembler code (and yes,
using two-reg forms).

You probably will not want to write those routines as plain C ever
given how important those are for performance (memset, clear-a-page),
so the dcb* macros won't ever be very hot, oh well.

> >> So my inclination is to revert the original patch. We can try again in a
> >> few years :D
> >> 
> >> Thoughts?
> >
> > I think you should give the clang people time to figure out what is
> > going on.
> 
> Yeah fair enough, will wait and see what their diagnosis is.

Thanks!


Segher

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