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Message-ID: <1jd0hyxjq7.fsf@starbuckisacylon.baylibre.com>
Date: Thu, 25 Jul 2019 16:38:24 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: Alexandre Mergnat <amergnat@...libre.com>
Cc: khilman@...libre.com, sboyd@...nel.org, narmstrong@...libre.com,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
baylibre-upstreaming@...ups.io,
Alexandre Mergnat <amergnat@...libre.com>
Subject: Re: [PATCH] clk: meson: axg-audio: migrate to the new parent description method
On Mon 22 Jul 2019 at 11:49, Alexandre Mergnat <amergnat@...libre.com> wrote:
> diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
> index 8028ff6f6610..4253a466eae8 100644
> --- a/drivers/clk/meson/axg-audio.c
> +++ b/drivers/clk/meson/axg-audio.c
> @@ -15,7 +15,6 @@
> #include <linux/slab.h>
>
> #include "axg-audio.h"
> -#include "clk-input.h"
> #include "clk-regmap.h"
> #include "clk-phase.h"
> #include "sclk-div.h"
> @@ -24,7 +23,7 @@
> #define AUD_SLV_SCLK_COUNT 10
> #define AUD_SLV_LRCLK_COUNT 10
>
> -#define AUD_GATE(_name, _reg, _bit, _pname, _iflags) \
> +#define AUD_GATE(_name, _reg, _bit, _phws, _iflags) \
> struct clk_regmap aud_##_name = { \
> .data = &(struct clk_regmap_gate_data){ \
> .offset = (_reg), \
> @@ -33,13 +32,13 @@ struct clk_regmap aud_##_name = { \
> .hw.init = &(struct clk_init_data) { \
> .name = "aud_"#_name, \
> .ops = &clk_regmap_gate_ops, \
> - .parent_names = (const char *[]){ _pname }, \
> + .parent_hws = (const struct clk_hw *[]) { &_phws.hw }, \
Those '\' are aligned with tabs. please check, you have aligned a few
with spaces instead
> .num_parents = 1, \
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