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Message-Id: <20190726134332.12626-7-sashal@kernel.org>
Date: Fri, 26 Jul 2019 09:43:02 -0400
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Petr Cvek <petrcvekcz@...il.com>,
Paul Burton <paul.burton@...s.com>, hauke@...ke-m.de,
john@...ozen.org, linux-mips@...r.kernel.org,
openwrt-devel@...ts.openwrt.org, pakahmar@...mail.com,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH AUTOSEL 4.14 07/37] MIPS: lantiq: Fix bitfield masking
From: Petr Cvek <petrcvekcz@...il.com>
[ Upstream commit ba1bc0fcdeaf3bf583c1517bd2e3e29cf223c969 ]
The modification of EXIN register doesn't clean the bitfield before
the writing of a new value. After a few modifications the bitfield would
accumulate only '1's.
Signed-off-by: Petr Cvek <petrcvekcz@...il.com>
Signed-off-by: Paul Burton <paul.burton@...s.com>
Cc: hauke@...ke-m.de
Cc: john@...ozen.org
Cc: linux-mips@...r.kernel.org
Cc: openwrt-devel@...ts.openwrt.org
Cc: pakahmar@...mail.com
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/mips/lantiq/irq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
index c4ef1c31e0c4..37caeadb2964 100644
--- a/arch/mips/lantiq/irq.c
+++ b/arch/mips/lantiq/irq.c
@@ -156,8 +156,9 @@ static int ltq_eiu_settype(struct irq_data *d, unsigned int type)
if (edge)
irq_set_handler(d->hwirq, handle_edge_irq);
- ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) |
- (val << (i * 4)), LTQ_EIU_EXIN_C);
+ ltq_eiu_w32((ltq_eiu_r32(LTQ_EIU_EXIN_C) &
+ (~(7 << (i * 4)))) | (val << (i * 4)),
+ LTQ_EIU_EXIN_C);
}
}
--
2.20.1
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