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Message-Id: <20190727175315.28834-5-martin.blumenstingl@googlemail.com>
Date: Sat, 27 Jul 2019 19:53:14 +0200
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: tglx@...utronix.de, jason@...edaemon.net, maz@...nel.org,
ralf@...ux-mips.org, paul.burton@...s.com, jhogan@...nel.org,
robh+dt@...nel.org, linux-mips@...r.kernel.org,
devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, mark.rutland@....com,
john@...ozen.org, hauke@...ke-m.de,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 4/5] MIPS: dts: lantiq: danube: mark the ebu0 node as interrupt-controller
The EBU IP block provides one interrupt line for PCI_INTA. Mark the ebu0
node as interrupt-controller and pass the parent interrupt from ICU so
the PCI_INTA interrupt from EBU can be used.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
arch/mips/boot/dts/lantiq/danube.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index 510be63c8bdf..0208174b53c8 100644
--- a/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -89,6 +89,9 @@
ebu0: ebu@...5300 {
compatible = "lantiq,ebu-xway";
reg = <0xe105300 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <30>;
+ #interrupt-cells = <2>;
};
pci0: pci@...5400 {
--
2.22.0
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