linux-kernel - Re: [PATCH v6 0/9] Add Error Disconnect Recover (EDR) support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <79eefd85ecc140cfb2811901089c6c47@AUSX13MPC107.AMER.DELL.COM>
Date:   Sat, 27 Jul 2019 00:34:40 +0000
From:   <Austin.Bolen@...l.com>
To:     <sathyanarayanan.kuppuswamy@...ux.intel.com>, <kbusch@...nel.org>
CC:     <bhelgaas@...gle.com>, <linux-pci@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <ashok.raj@...el.com>,
        <keith.busch@...el.com>, <Austin.Bolen@...l.com>,
        <Huong.Nguyen@...l.com>
Subject: Re: [PATCH v6 0/9] Add Error Disconnect Recover (EDR) support

On 7/26/2019 6:33 PM, sathyanarayanan kuppuswamy wrote:
> +Austin , Huong
>
> On 7/26/19 2:53 PM, Keith Busch wrote:
>> On Fri, Jul 26, 2019 at 02:43:10PM -0700, sathyanarayanan.kuppuswamy@...ux.intel.com wrote:
>>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
>>>
>>> This patchset adds support for following features:
>>>
>>> 1. Error Disconnect Recover (EDR) support.
>>> 2. _OSC based negotiation support for DPC.
>>>
>>> You can find EDR spec in the following link.
>>>
>>> https://members.pcisig.com/wg/PCI-SIG/document/12614
>> Thank you for sticking with this. I've reviewed the series and I think
>> this looks good for the next merge window.
>>
>> Acked-by: Keith Busch <keith.busch@...el.com>

Tested on a DPC-enabled PCIe switch (Broadcom PEX9733) in a Dell
PowerEdge R740xd.  Injected fatal and non-fatal errors on an NVMe
endpoint below the switch and on the switch downstream port itself and
verified errors were contained and then recovered at the PCIe level.

Tested-by: Austin Bolen <Austin.Bolen@...l.com‎>

>>