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Date: Mon, 29 Jul 2019 01:34:32 +0800
From: Zhou Yanjie <zhouyanjie@...o.com>
To: linux-mips@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
robh+dt@...nel.org, paul.burton@...s.com, tglx@...utronix.de,
mark.rutland@....com, jason@...edaemon.net, marc.zyngier@....com
Subject: [PATCH 3/4 v4] dt-bindings: interrupt-controller: Add new Ingenic Socs bindings.
Add the interrupt-controller bindings for the JZ4760/JZ4760B and
the X1000/X1000E and the X1500 Socs from Ingenic.
Signed-off-by: Zhou Yanjie <zhouyanjie@...o.com>
---
.../devicetree/bindings/interrupt-controller/ingenic,intc.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
index d4373d0..a96e120 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
@@ -5,9 +5,14 @@ Required properties:
- compatible : should be "ingenic,<socname>-intc". Valid strings are:
ingenic,jz4740-intc
ingenic,jz4725b-intc
+ ingenic,jz4760-intc
+ ingenic,jz4760b-intc
ingenic,jz4770-intc
ingenic,jz4775-intc
ingenic,jz4780-intc
+ ingenic,x1000-intc
+ ingenic,x1000e-intc
+ ingenic,x1500-intc
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
--
2.7.4
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