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Message-ID: <6be021a31eb9a7976b2347dd3ac3cd7f10c8d71f.camel@linux.intel.com>
Date: Mon, 29 Jul 2019 04:50:40 -0700
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: Colin Ian King <colin.king@...onical.com>, wharms@....de
Cc: Zhang Rui <rui.zhang@...el.com>,
Eduardo Valentin <edubezval@...il.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
linux-pm@...r.kernel.org, kernel-janitors@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH][next] drivers: thermal: processor_thermal_device: fix
missing bitwise-or operator
On Mon, 2019-07-29 at 12:29 +0100, Colin Ian King wrote:
> On 29/07/2019 12:24, walter harms wrote:
> >
> >
> > Am 29.07.2019 12:29, schrieb Colin King:
> > > From: Colin Ian King <colin.king@...onical.com>
> > >
> > > The variable val is having the top 8 bits cleared and then the
> > > variable
> > > is being re-assinged and setting just the top 8 bits. I believe
> > > the
> > > intention was bitwise-or in the top 8 bits. Fix this by
> > > replacing
> > > the = operator with |= instead.
> > >
> > > Addresses-Coverity: ("Unused value")
> > > Fixes: b0c74b08517e ("drivers: thermal: processor_thermal_device:
> > > Export sysfs inteface for TCC offset")
> > > Signed-off-by: Colin Ian King <colin.king@...onical.com>
> > > ---
> > > .../thermal/intel/int340x_thermal/processor_thermal_device.c
> > > | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git
> > > a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.
> > > c
> > > b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.
> > > c
> > > index 6f6ac6a8e82d..cb22317911ef 100644
> > > ---
> > > a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.
> > > c
> > > +++
> > > b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.
> > > c
> > > @@ -164,7 +164,7 @@ static int tcc_offset_update(int tcc)
> > > return err;
> > >
> > > val = ~GENMASK_ULL(31, 24);
> > > - val = (tcc & 0xff) << 24;
> > > + val |= (tcc & 0xff) << 24;
> > >
> >
> > I do not think that GENMASK makes sence here.
>
> Yeah, val &= ~GENMASK_ULL(31, 24)
>
> I'll send a V2
>
Thanks Colin for the fix.
-Srinivas
>
> >
> > re,
> > wh
> >
> > > err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val);
> > > if (err)
>
>
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