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Message-ID: <20190730181038.GK4264@sirena.org.uk>
Date:   Tue, 30 Jul 2019 19:10:38 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Philippe Schenker <dev@...henker.ch>
Cc:     Liam Girdwood <lgirdwood@...il.com>, linux-kernel@...r.kernel.org,
        Philippe Schenker <philippe.schenker@...adex.com>
Subject: Re: [RFC PATCH 1/2] Regulator: Core: Add clock-enable to
 fixed-regulator

On Tue, Jul 30, 2019 at 07:30:04PM +0200, Philippe Schenker wrote:
> From: Philippe Schenker <philippe.schenker@...adex.com>
> 
> This adds the possibility to enable a fixed-regulator with a clock.

Why?  What does the hardware which makes this make sense look like?
Your cover letter didn't explain at all clearly, it just said that
there's a circuit that is connected to a clock which somehow switches
something but it's not clear.  It's certainly not clear that this should
be in the core, the circuit doesn't sound like a good idea at all.

> Signed-off-by: <philippe.schenker@...adex.com>
> Signed-off-by: Philippe Schenker <philippe.schenker@...adex.com>

This needs a cleanup.

>  
>  	/* cares about last_off_jiffy only if off_on_delay is required by
> @@ -2796,6 +2805,9 @@ static int _regulator_is_enabled(struct regulator_dev *rdev)
>  	if (rdev->ena_pin)
>  		return rdev->ena_gpio_state;
>  
> +	if (rdev->ena_clk)
> +		return (rdev->ena_clk_state > 0) ? 1 : 0;
> +

Please write normal conditional statements, this isn't helping
legibility.  Though in this case the ternery operator is totally
redundant anyway...

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