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Message-ID: <20190730193502.GR31406@gate.crashing.org>
Date: Tue, 30 Jul 2019 14:35:02 -0500
From: Segher Boessenkool <segher@...nel.crashing.org>
To: Arnd Bergmann <arnd@...db.de>
Cc: Nathan Chancellor <natechancellor@...il.com>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Michael Ellerman <mpe@...erman.id.au>,
christophe leroy <christophe.leroy@....fr>,
kbuild test robot <lkp@...el.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
clang-built-linux <clang-built-linux@...glegroups.com>
Subject: Re: [PATCH] powerpc: workaround clang codegen bug in dcbz
On Tue, Jul 30, 2019 at 08:24:14PM +0200, Arnd Bergmann wrote:
> On Tue, Jul 30, 2019 at 6:16 PM Segher Boessenkool
> <segher@...nel.crashing.org> wrote:
> > in_le32 and friends? Yeah, huh. If LLVM copies that to the stack as
> > well, its (not byte reversing) read will be atomic just fine, so things
> > will still work correctly.
>
> byteorder is fine, the problem I was thinking of is when moving the load/store
> instructions around the barriers that synchronize with DMA, or turning
> them into different-size accesses. Changing two consecutive 16-bit mmio reads
> into an unaligned 32-bit read will rarely have the intended effect ;-)
Most such barriers will also work on the copy accesses, I think. But
yes it depends on exactly how it is written. The {in,out}_{be,le}<N>
ones use sync;store for out and sync;load;trap;isync for in, so they
should be safe ;-)
(Well, almost -- writes to I/O will not necessarily actually happen
before other stores, not from these macros alone at least).
Should be pretty easy to check what LLVM makes of this?
Segher
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