linux-kernel - RE: [PATCH v3] arm64: dts: ls1028a: Add esdhc node in dts

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Message-ID: <VI1PR04MB4158BFD0D6C44BB6817E1483E9DC0@VI1PR04MB4158.eurprd04.prod.outlook.com>
Date:   Tue, 30 Jul 2019 10:02:44 +0000
From:   Yinbo Zhu <yinbo.zhu@....com>
To:     Shawn Guo <shawnguo@...nel.org>, Leo Li <leoyang.li@....com>,
        Rob Herring <robh+dt@...nel.org>
CC:     Xiaobo Xie <xiaobo.xie@....com>,
        Mark Rutland <mark.rutland@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "Y.b. Lu" <yangbo.lu@....com>, Jiafei Pan <jiafei.pan@....com>,
        Ashish Kumar <ashish.kumar@....com>,
        Yinbo Zhu <yinbo.zhu@....com>
Subject: RE: [PATCH v3] arm64: dts: ls1028a: Add esdhc node in dts

Hi, 

I just check mmc upstream code, that patch still not upstream.
Please help merge it to upstream tree.

Thanks
Regards,
Yinbo Zhu

> -----Original Message-----
> From: Yinbo Zhu [mailto:yinbo.zhu@....com]
> Sent: 2019年5月15日 16:49
> To: Shawn Guo <shawnguo@...nel.org>; Leo Li <leoyang.li@....com>; Rob
> Herring <robh+dt@...nel.org>
> Cc: Yinbo Zhu <yinbo.zhu@....com>; Xiaobo Xie <xiaobo.xie@....com>; Mark
> Rutland <mark.rutland@....com>; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> linux-mmc@...r.kernel.org; Y.b. Lu <yangbo.lu@....com>; Jiafei Pan
> <jiafei.pan@....com>; Ashish Kumar <ashish.kumar@....com>
> Subject: [PATCH v3] arm64: dts: ls1028a: Add esdhc node in dts
> 
> From: Ashish Kumar <Ashish.Kumar@....com>
> 
> This patch is to add esdhc node and enable SD UHS-I, eMMC HS200 for
> ls1028ardb/ls1028aqds board.
> 
> Signed-off-by: Ashish Kumar <Ashish.Kumar@....com>
> Signed-off-by: Yangbo Lu <yangbo.lu@....com>
> Signed-off-by: Yinbo Zhu <yinbo.zhu@....com>
> ---
> Change in v3:
> 		replace "esdhc@" with "mmc@"
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |    8 ++++++
>  arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   13 ++++++++++
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi    |   27
> +++++++++++++++++++++
>  3 files changed, 48 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> index 14c79f4..180e5d2 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> @@ -42,6 +42,14 @@
>  	status = "okay";
>  };
> 
> +&esdhc {
> +	status = "okay";
> +};
> +
> +&esdhc1 {
> +	status = "okay";
> +};
> +
>  &i2c0 {
>  	status = "okay";
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> index f86b054..1bfaf42 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> @@ -30,6 +30,19 @@
>  	};
>  };
> 
> +&esdhc {
> +	status = "okay";
> +	sd-uhs-sdr104;
> +	sd-uhs-sdr50;
> +	sd-uhs-sdr25;
> +	sd-uhs-sdr12;
> +	};
> +
> +&esdhc1 {
> +	status = "okay";
> +	mmc-hs200-1_8v;
> +	};
> +
>  &i2c0 {
>  	status = "okay";
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 2896bbc..462833c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -274,6 +274,33 @@
>  			status = "disabled";
>  		};
> 
> +		esdhc: mmc@...0000 {
> +			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
> +			reg = <0x0 0x2140000 0x0 0x10000>;
> +			interrupts = <0 28 0x4>; /* Level high type */
> +			clock-frequency = <0>; /* fixed up by bootloader */
> +			clocks = <&clockgen 2 1>;
> +			voltage-ranges = <1800 1800 3300 3300>;
> +			sdhci,auto-cmd12;
> +			little-endian;
> +			bus-width = <4>;
> +			status = "disabled";
> +		};
> +
> +		esdhc1: mmc@...0000 {
> +			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
> +			reg = <0x0 0x2150000 0x0 0x10000>;
> +			interrupts = <0 63 0x4>; /* Level high type */
> +			clock-frequency = <0>; /* fixed up by bootloader */
> +			clocks = <&clockgen 2 1>;
> +			voltage-ranges = <1800 1800 3300 3300>;
> +			sdhci,auto-cmd12;
> +			broken-cd;
> +			little-endian;
> +			bus-width = <4>;
> +			status = "disabled";
> +		};
> +
>  		sata: sata@...0000 {
>  			compatible = "fsl,ls1028a-ahci";
>  			reg = <0x0 0x3200000 0x0 0x10000>,
> --
> 1.7.1