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Message-ID: <CAOMZO5AxPHHobQQhq30fjLVeSroLdvdT0+GqCWi8it1ejhDONA@mail.gmail.com>
Date:   Tue, 30 Jul 2019 12:19:57 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Lukasz Majewski <lukma@...x.de>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Stefan Agner <stefan@...er.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: DTS: vybrid: Update qspi node description for VF610
 BK4 board

Hi Lukasz,

Subject line could be improved:

ARM: dts: vf610-bk4: Fix qspi node description

On Tue, Jul 30, 2019 at 12:06 PM Lukasz Majewski <lukma@...x.de> wrote:
>
> Before this change the device tree description of qspi node for
> second memory on BK4 board was wrong (applicable to old, in-house
> tunned fsl-quadspi.c driver).
>
> As a result this memory was not recognized correctly when used
> with the new spi-fsl-qspi.c driver.
>
> From the dt-bindings:
>
> "Required SPI slave node properties:
>   - reg: There are two buses (A and B) with two chip selects each.
> This encodes to which bus and CS the flash is connected:
> <0>: Bus A, CS 0
> <1>: Bus A, CS 1
> <2>: Bus B, CS 0
> <3>: Bus B, CS 1"
>
> According to above with new driver the second SPI-NOR memory shall
> have reg=<2> as it is connected to Bus B, CS 0.

I am glad you got it working!

This looks very familiar with the suggestion I sent yesterday:
http://lists.infradead.org/pipermail/linux-mtd/2019-July/090655.html

It is a good practice to give some credit to someone who has helped in
finding the solution of your problem.

Adding a Suggested-by: Fabio Estevam <festevam@...il.com> would be nice here.

This also needs a Fixes tag.

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