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Message-ID: <20190731174709.471126e6.cohuck@redhat.com>
Date: Wed, 31 Jul 2019 17:47:09 +0200
From: Cornelia Huck <cohuck@...hat.com>
To: Alex Williamson <alex.williamson@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] vfio: re-arrange vfio region definitions
On Wed, 17 Jul 2019 13:49:56 +0200
Cornelia Huck <cohuck@...hat.com> wrote:
> It is easy to miss already defined region types. Let's re-arrange
> the definitions a bit and add more comments to make it hopefully
> a bit clearer.
>
> No functional change.
>
> Signed-off-by: Cornelia Huck <cohuck@...hat.com>
> ---
> include/uapi/linux/vfio.h | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
Friendly ping :)
>
> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> index 8f10748dac79..d9bcf40240be 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -295,15 +295,23 @@ struct vfio_region_info_cap_type {
> __u32 subtype; /* type specific */
> };
>
> +/*
> + * List of region types, global per bus driver.
> + * If you introduce a new type, please add it here.
> + */
> +
> +/* PCI region type containing a PCI vendor part */
> #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
> #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
> +#define VFIO_REGION_TYPE_GFX (1)
> +#define VFIO_REGION_TYPE_CCW (2)
>
> -/* 8086 Vendor sub-types */
> +/* 8086 vendor PCI sub-types */
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
>
> -#define VFIO_REGION_TYPE_GFX (1)
> +/* GFX sub-types */
> #define VFIO_REGION_SUBTYPE_GFX_EDID (1)
>
> /**
> @@ -353,20 +361,17 @@ struct vfio_region_gfx_edid {
> #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
> };
>
> -#define VFIO_REGION_TYPE_CCW (2)
> /* ccw sub-types */
> #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1)
>
> +/* 10de vendor PCI sub-types */
> /*
> - * 10de vendor sub-type
> - *
> * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
> */
> #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
>
> +/* 1014 vendor PCI sub-types*/
> /*
> - * 1014 vendor sub-type
> - *
> * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
> * to do TLB invalidation on a GPU.
> */
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