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Message-ID: <3175cedf-b00b-c87c-1b52-4c9a993a7797@intel.com>
Date:   Tue, 30 Jul 2019 17:24:02 -0700
From:   jinglin <jing.lin@...el.com>
To:     "Kirill A. Shutemov" <kirill@...temov.name>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>
Cc:     x86@...nel.org, "Luck, Tony" <tony.luck@...el.com>,
        "Kumar, Sanjay K" <sanjay.k.kumar@...el.com>,
        linux-kernel@...r.kernel.org,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: Re: [PATCH] x86/asm: Add support for MOVDIR64B instruction


On 7/30/19 4:05 PM, Kirill A. Shutemov wrote:
> Add support for a new instruction MOVDIR64B. The instruction moves
> 64-bytes as direct-store with 64-byte write atomicity from source memory
> address to destination memory address.
>
> MOVDIR64B requires the destination address to be 64-byte aligned. No
> alignment restriction is enforced for source operand.
>
> See Intel Software Developer’s Manual for more information on the
> instruction.
>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
Reviewed-by: Jing Lin <jing.lin@...el.com>
> ---
>
> Several upcoming patchsets will make use of the helper.
>
> ---
>   arch/x86/include/asm/special_insns.h | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
> index 219be88a59d2..059e7bd331d2 100644
> --- a/arch/x86/include/asm/special_insns.h
> +++ b/arch/x86/include/asm/special_insns.h
> @@ -248,6 +248,13 @@ static inline void clwb(volatile void *__p)
>   
>   #define nop() asm volatile ("nop")
>   
> +static inline void movdir64b(void *dst, const void *src)
> +{
> +	/* movdir64b [rdx], rax */
> +	asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> +			: "=m" (*(char *)dst)
> +			: "d" (src), "a" (dst));
> +}
>   
>   #endif /* __KERNEL__ */
>   

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