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Message-ID: <3908561D78D1C84285E8C5FCA982C28F7EA0719C@ORSMSX104.amr.corp.intel.com>
Date: Thu, 1 Aug 2019 22:06:27 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: Borislav Petkov <bp@...en8.de>,
"Kirill A. Shutemov" <kirill@...temov.name>
CC: Alexey Dobriyan <adobriyan@...il.com>,
"kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Lin, Jing" <jing.lin@...el.com>, "x86@...nel.org" <x86@...nel.org>
Subject: RE: [PATCH] x86/asm: Add support for MOVDIR64B instruction
> I think Tony's in the right direction. We already do dst "sizing" like
> that for the compiler in clwb().
The clwb case does look like what we want for movdir64b().
But is it right for clwb() ... that doesn't modify anything, just pushes
things from cache to memory. So why is it using "+m"?
-Tony
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