linux-kernel - Re: [PATCH v3 5/5] dt-bindings: Update the riscv,isa string description

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Message-ID: <40ec671a2ef7204ad890b2ca43ec92d6981d6344.camel@wdc.com>
Date:   Thu, 1 Aug 2019 23:07:36 +0000
From:   Atish Patra <Atish.Patra@....com>
To:     "robh+dt@...nel.org" <robh+dt@...nel.org>
CC:     "info@...ux.net" <info@...ux.net>,
        "palmer@...ive.com" <palmer@...ive.com>,
        "allison@...utok.net" <allison@...utok.net>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        Anup Patel <Anup.Patel@....com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "johan@...nel.org" <johan@...nel.org>,
        "tiny.windzz@...il.com" <tiny.windzz@...il.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "gary@...yguo.net" <gary@...yguo.net>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v3 5/5] dt-bindings: Update the riscv,isa string
 description

On Thu, 2019-08-01 at 09:50 -0600, Rob Herring wrote:
> On Wed, Jul 31, 2019 at 6:58 PM Atish Patra <atish.patra@....com>
> wrote:
> > Since the RISC-V specification states that ISA description strings
> > are
> > case-insensitive, there's no functional difference between mixed-
> > case,
> > upper-case, and lower-case ISA strings. Thus, to simplify parsing,
> > specify that the letters present in "riscv,isa" must be all
> > lowercase.
> > 
> > Suggested-by: Paul Walmsley <paul.walmsley@...ive.com>
> > Signed-off-by: Atish Patra <atish.patra@....com>
> > ---
> >  Documentation/devicetree/bindings/riscv/cpus.yaml | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > index c899111aa5e3..4f0acb00185a 100644
> > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > @@ -46,10 +46,12 @@ properties:
> >            - rv64imafdc
> >      description:
> >        Identifies the specific RISC-V instruction set architecture
> > -      supported by the hart.  These are documented in the RISC-V
> > +      supported by the hart. These are documented in the RISC-V
> >        User-Level ISA document, available from
> >        https://riscv.org/specifications/
> > 
> > +      Letters in the riscv,isa string must be all lowercase.
> > +
> 
> The schemas are case sensitive this looks pretty pointless without
> the
> context of the commit msg. Can you prefix with 'While the
> specification is case insensitive, "
> 

Sure. How about this ?

"While the above isa strings in ISA specification are case insensitive,
letters in the riscv,isa string must be all lowercase to simplify
parsing."


> For some background, FDT generally always has been case sensitive too
> (dtc won't merge/override nodes/properties with differing case). It's
> really only some older true OF systems that were case insensitive.
> The
> kernel had a mixture of case sensitive and insensitive comparisons
> somewhat depending on the arch and whether of_prop_cmp/of_node_cmp or
> str*cmp functions were used. There's been a lot of clean-up and now
> most comparisons are case sensitive with only Sparc having some
> deviation.
> 
> Rob

-- 
Regards,
Atish