[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20190801005843.10343-1-atish.patra@wdc.com>
Date: Wed, 31 Jul 2019 17:58:38 -0700
From: Atish Patra <atish.patra@....com>
To: linux-kernel@...r.kernel.org
Cc: Atish Patra <atish.patra@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Allison Randal <allison@...utok.net>,
Anup Patel <anup.patel@....com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
devicetree@...r.kernel.org, Enrico Weigelt <info@...ux.net>,
Gary Guo <gary@...yguo.net>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Johan Hovold <johan@...nel.org>,
linux-riscv@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Palmer Dabbelt <palmer@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Yangtao Li <tiny.windzz@...il.com>
Subject: [PATCH v3 0/5] Miscellaneous fixes
This patch series have some unrelated fixes related
to clocksource, dt-bindings and isa strings.
I combined them into series as most of them are
prerequisite for kvm patch series.
Changes from v2->v3:
1. Updated commit text of dt binding patch.
2. Removed couple of remaining uppercase usage.
Changes from v1->v2:
1. Dropped the case-insensitive support patch and added a dt-bindings
update patch.
2. Added a export symbol patch.
Anup Patel (1):
RISC-V: Add riscv_isa reprensenting ISA features common across CPUs
Atish Patra (4):
RISC-V: Remove per cpu clocksource
RISC-V: Fix unsupported isa string info.
RISC-V: Export few kernel symbols
dt-bindings: Update the riscv,isa string description
.../devicetree/bindings/riscv/cpus.yaml | 4 +-
arch/riscv/include/asm/hwcap.h | 16 +++++++
arch/riscv/kernel/cpu.c | 47 +++++++++++++++----
arch/riscv/kernel/cpufeature.c | 39 +++++++++++++--
arch/riscv/kernel/smp.c | 2 +-
arch/riscv/kernel/time.c | 1 +
drivers/clocksource/timer-riscv.c | 6 +--
7 files changed, 96 insertions(+), 19 deletions(-)
--
2.21.0
Powered by blists - more mailing lists