linux-kernel - Re: [PATCH] perf/x86/amd: Change NMI latency mitigation to use a timestamp

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Message-ID: <925c3458-aeae-a44b-ddd5-40a1e173a307@amd.com>
Date:   Fri, 2 Aug 2019 14:33:41 +0000
From:   "Lendacky, Thomas" <Thomas.Lendacky@....com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Peter Zijlstra <peterz@...radead.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "x86@...nel.org" <x86@...nel.org>, Ingo Molnar <mingo@...hat.com>,
        Borislav Petkov <bp@...en8.de>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Jiri Olsa <jolsa@...hat.com>,
        Jerry Hoemann <jerry.hoemann@....com>
Subject: Re: [PATCH] perf/x86/amd: Change NMI latency mitigation to use a
 timestamp

On 8/1/19 4:59 PM, Thomas Gleixner wrote:
> On Thu, 1 Aug 2019, Peter Zijlstra wrote:
>> On Thu, Aug 01, 2019 at 11:34:23PM +0200, Thomas Gleixner wrote:
>>> Avoid the whole NMI mess, make the PMC interrupt a proper vector in the
>>> highest prio bucket and instead of using CLI/STI use CR8. That would have
>>> the additional advantage that we could prevent perf "NMI" then occsionally :)
>>
>> Exactly, and not only the PMC, we can basically start giving out actual
>> vectors on register_nmi_handler() and do away with all that shared line
>> crap.
>>
>> And then the actual NMI line will be mostly empty again, and it can read
>> its stupid slow reason port again.
>>
>> One complication though; IRET et al only do EFLAGS, not CR8, so that's
>> going to be massive fun :-(

Talking to the hardware folks, they say setting CR8 is a serializing
instruction and has to communicate out to the APIC, so it's better to
use CLI/STI.

Thanks,
Tom

>>
>> Did I say I hates the x86 interrupt scheme?
> 
> You're not alone.
> 
> That stuff definitely violates article 3 of the Convention for the
> Protection of Human Rights and Fundamental Freedoms.
> 
>