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Message-ID: <20190802144056.GC30661@zn.tnic>
Date: Fri, 2 Aug 2019 16:40:56 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Luck, Tony" <tony.luck@...el.com>
Cc: "Kirill A. Shutemov" <kirill@...temov.name>,
Alexey Dobriyan <adobriyan@...il.com>,
"kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Lin, Jing" <jing.lin@...el.com>, "x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH] x86/asm: Add support for MOVDIR64B instruction
On Thu, Aug 01, 2019 at 10:06:27PM +0000, Luck, Tony wrote:
> > I think Tony's in the right direction. We already do dst "sizing" like
> > that for the compiler in clwb().
>
> The clwb case does look like what we want for movdir64b().
>
> But is it right for clwb() ... that doesn't modify anything, just pushes
> things from cache to memory. So why is it using "+m"?
Here some hints from to my notes, if you want to know more detail, I can
ping my gcc guy.
It needs to be an input and an output operand so that it prevents gcc
from reordering accesses to it after the insn happens, i.e., you don't
want to touch it after CLFLUSH has executed.
And also, you want to make sure it works with all gcc versions and this
is, I was told, the right way to do it. For example, some gcc versions
consider it not limited to 64 bytes of memory being touched but a full
memory clobber.
HTH.
--
Regards/Gruss,
Boris.
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