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Message-ID: <20190802081441.GA9725@lst.de>
Date: Fri, 2 Aug 2019 10:14:41 +0200
From: Christoph Hellwig <hch@....de>
To: Will Deacon <will@...nel.org>
Cc: Christoph Hellwig <hch@....de>, iommu@...ts.linux-foundation.org,
Shawn Anastasio <shawn@...stas.io>,
Michael Ellerman <mpe@...erman.id.au>,
Russell King <linux@...linux.org.uk>,
Catalin Marinas <catalin.marinas@....com>,
Robin Murphy <robin.murphy@....com>,
linuxppc-dev@...ts.ozlabs.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dma-mapping: fix page attributes for dma_mmap_*
On Thu, Aug 01, 2019 at 05:44:12PM +0100, Will Deacon wrote:
> > > Although arch_dma_mmap_pgprot() is a bit of a misnomer now that it only
> > > gets involved in the non-coherent case.
> >
> > A better name is welcome.
>
> How about arch_dma_noncoherent_mmap_pgprot() ? Too long?
Sounds a little long yes. And doesn't fix the additional problem that
we don't just it for mmap but also for the in-kernel remapping these
days.
> > But my worry is how this interacts with architectures that have an
> > uncached segment (mips, nios2, microblaze, extensa) where we'd have
> > the kernel access DMA_ATTR_WRITE_COMBINE mappigns using the uncached
> > segment, and userspace mmaps using pgprot_writecombine, which could
> > lead to aliasing issues. But then again mips already supports
> > DMA_ATTR_WRITE_COMBINE, so this must be ok somehow. I guess I'll
> > need to field that question to the relevant parties.
>
> Or it's always been busted and happens to work out in practice...
I've sent a ping to the mips folks. While we'are at it: arm64
and arm32 (optionally) map dma coherent allocations as write combine.
I suspect this hasn't always just been busted but intentional (of course!),
but is there any chance to get a quote from the arm architecture spec
on why this is fine as it looks rather confusion?
Also if we assume mips is buggy DMA_ATTR_WRITE_COMBINE really just seems
to be there for old arm platforms, which makes the scope pretty limited.
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