lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c0f4de86-423a-35df-3744-40db89f2fdfe@nvidia.com>
Date:   Fri, 2 Aug 2019 09:51:24 +0100
From:   Jon Hunter <jonathanh@...dia.com>
To:     Vinod Koul <vkoul@...nel.org>
CC:     Sameer Pujar <spujar@...dia.com>,
        Peter Ujfalusi <peter.ujfalusi@...com>,
        <dan.j.williams@...el.com>, <tiwai@...e.com>,
        <dmaengine@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <sharadg@...dia.com>, <rlokhande@...dia.com>, <dramesh@...dia.com>,
        <mkumard@...dia.com>
Subject: Re: [PATCH] [RFC] dmaengine: add fifo_size member


On 31/07/2019 16:16, Vinod Koul wrote:
> On 31-07-19, 10:48, Jon Hunter wrote:
>>
>> On 29/07/2019 07:10, Vinod Koul wrote:
>>> On 23-07-19, 11:24, Sameer Pujar wrote:
>>>>
>>>> On 7/19/2019 10:34 AM, Vinod Koul wrote:
>>>>> On 05-07-19, 11:45, Sameer Pujar wrote:
>>>>>> Hi Vinod,
>>>>>>
>>>>>> What are your final thoughts regarding this?
>>>>> Hi sameer,
>>>>>
>>>>> Sorry for the delay in replying
>>>>>
>>>>> On this, I am inclined to think that dma driver should not be involved.
>>>>> The ADMAIF needs this configuration and we should take the path of
>>>>> dma_router for this piece and add features like this to it
>>>>
>>>> Hi Vinod,
>>>>
>>>> The configuration is needed by both ADMA and ADMAIF. The size is
>>>> configurable
>>>> on ADMAIF side. ADMA needs to know this info and program accordingly.
>>>
>>> Well I would say client decides the settings for both DMA, DMAIF and
>>> sets the peripheral accordingly as well, so client communicates the two
>>> sets of info to two set of drivers
>>
>> That maybe, but I still don't see how the information is passed from the
>> client in the first place. The current problem is that there is no means
>> to pass both a max-burst size and fifo-size to the DMA driver from the
>> client.
> 
> So one thing not clear to me is why ADMA needs fifo-size, I thought it
> was to program ADMAIF and if we have client programme the max-burst
> size to ADMA and fifo-size to ADMAIF we wont need that. Can you please
> confirm if my assumption is valid?

Let me see if I can clarify ...

1. The FIFO we are discussing here resides in the ADMAIF module which is
   a separate hardware block the ADMA (although the naming make this
   unclear).

2. The size of FIFO in the ADMAIF is configurable and it this is
   configured via the ADMAIF registers. This allows different channels
   to use different FIFO sizes. Think of this as a shared memory that is
   divided into n FIFOs shared between all channels.

3. The ADMA, not the ADMAIF, manages the flow to the FIFO and this is
   because the ADMAIF only tells the ADMA when a word has been
   read/written (depending on direction), the ADMAIF does not indicate
   if the FIFO is full, empty, etc. Hence, the ADMA needs to know the
   total FIFO size.

So the ADMA needs to know the FIFO size so that it does not overrun the
FIFO and we can also set a burst size (less than the total FIFO size)
indicating how many words to transfer at a time. Hence, the two parameters.

Even if we were to use some sort of router between the ADMA and ADMAIF,
the client still needs to indicate to the ADMA what FIFO size and burst
size, if I am following you correctly.

Let me know if this is clearer.

Thanks
Jon

-- 
nvpublic

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ