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Message-ID: <20190805214600.4c84ccd7@cakuba.netronome.com>
Date: Mon, 5 Aug 2019 21:46:14 -0700
From: Jakub Kicinski <jakub.kicinski@...ronome.com>
To: Jose Abreu <Jose.Abreu@...opsys.com>
Cc: netdev@...r.kernel.org, Joao Pinto <Joao.Pinto@...opsys.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...com>,
"David S. Miller" <davem@...emloft.net>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 06/10] net: stmmac: Implement RSS and enable it
in XGMAC core
On Mon, 5 Aug 2019 20:01:19 +0200, Jose Abreu wrote:
> Implement the RSS functionality and add the corresponding callbacks in
> XGMAC core.
>
> Signed-off-by: Jose Abreu <joabreu@...opsys.com>
> ---
> Cc: Giuseppe Cavallaro <peppe.cavallaro@...com>
> Cc: Alexandre Torgue <alexandre.torgue@...com>
> Cc: Jose Abreu <joabreu@...opsys.com>
> Cc: "David S. Miller" <davem@...emloft.net>
> Cc: Maxime Coquelin <mcoquelin.stm32@...il.com>
> Cc: netdev@...r.kernel.org
> Cc: linux-stm32@...md-mailman.stormreply.com
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
> index c4c45402b8f8..9ff9d9ac1a50 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
> @@ -254,6 +254,34 @@ static void dwxgmac2_clear(struct dma_desc *p)
> p->des3 = 0;
> }
>
> +static int dwxgmac2_get_rx_hash(struct dma_desc *p, u32 *hash,
> + enum pkt_hash_types *type)
> +{
> + unsigned int rdes3 = le32_to_cpu(p->des3);
> + u32 ptype;
> +
> + if (rdes3 & XGMAC_RDES3_RSV) {
> + ptype = (rdes3 & XGMAC_RDES3_L34T) >> XGMAC_RDES3_L34T_SHIFT;
> +
> + switch (ptype) {
> + case 0x1:
> + case 0x2:
> + case 0x9:
> + case 0xA:
nit: it'd be nice to have defines for these constants
> + *type = PKT_HASH_TYPE_L4;
> + break;
> + default:
> + *type = PKT_HASH_TYPE_L3;
> + break;
> + }
> +
> + *hash = le32_to_cpu(p->des1);
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> const struct stmmac_desc_ops dwxgmac210_desc_ops = {
> .tx_status = dwxgmac2_get_tx_status,
> .rx_status = dwxgmac2_get_rx_status,
> @@ -4182,7 +4208,7 @@ int stmmac_dvr_probe(struct device *device,
> struct net_device *ndev = NULL;
> struct stmmac_priv *priv;
> u32 queue, maxq;
> - int ret = 0;
> + int i, ret = 0;
>
> ndev = devm_alloc_etherdev_mqs(device, sizeof(struct stmmac_priv),
> MTL_MAX_TX_QUEUES, MTL_MAX_RX_QUEUES);
> @@ -4290,6 +4316,14 @@ int stmmac_dvr_probe(struct device *device,
> #endif
> priv->msg_enable = netif_msg_init(debug, default_msg_level);
>
> + /* Initialize RSS */
> + netdev_rss_key_fill(priv->rss.key, sizeof(priv->rss.key));
> + for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
> + priv->rss.table[i] = i % priv->plat->rx_queues_to_use;
ethtool_rxfh_indir_default() ?
> + if (priv->dma_cap.rssen && priv->plat->rss_en)
> + ndev->features |= NETIF_F_RXHASH;
> +
> /* MTU range: 46 - hw-specific max */
> ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
> if ((priv->plat->enh_desc) || (priv->synopsys_id >= DWMAC_CORE_4_00))
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