linux-kernel - Re: [PATCH] arm64: mm: print hexadecimal EC value in mem_abort

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Message-ID: <20190806123450.GE475@lakrids.cambridge.arm.com>
Date:   Tue, 6 Aug 2019 13:34:50 +0100
From:   Mark Rutland <mark.rutland@....com>
To:     Miles Chen <miles.chen@...iatek.com>
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, wsd_upstream@...iatek.com,
        Anshuman Khandual <anshuman.khandual@....com>,
        James Morse <james.morse@....com>
Subject: Re: [PATCH] arm64: mm: print hexadecimal EC value in
 mem_abort_decode()

On Tue, Aug 06, 2019 at 07:29:48PM +0800, Miles Chen wrote:
> This change prints the hexadecimal EC value in mem_abort_decode(),
> which makes it easier to lookup the corresponding EC in
> the ARM Architecture Reference Manual.
> 
> The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem
> faults") prints useful information when memory abort occurs. It would
> be easier to lookup "0x25" instead of "DABT" in the document. Then we
> can check the corresponding ISS.
> 
> For example:
> Current	info	  	Document
> 		  	EC	Exception class
> "CP15 MCR/MRC"		0x3	"MCR or MRC access to CP15a..."
> "ASIMD"			0x7	"Access to SIMD or floating-point..."
> "DABT (current EL)" 	0x25	"Data Abort taken without..."
> ...
> 
> Before:
> Unable to handle kernel paging request at virtual address 000000000000c000
> Mem abort info:
>   ESR = 0x96000046
>   Exception class = DABT (current EL), IL = 32 bits
>   SET = 0, FnV = 0
>   EA = 0, S1PTW = 0
> Data abort info:
>   ISV = 0, ISS = 0x00000046
>   CM = 0, WnR = 1
> 
> After:
> Unable to handle kernel paging request at virtual address 000000000000c000
> Mem abort info:
>   ESR = 0x96000046
>   EC = 0x25, Exception class = DABT (current EL), IL = 32 bits
>   SET = 0, FnV = 0
>   EA = 0, S1PTW = 0
> Data abort info:
>   ISV = 0, ISS = 0x00000046
>   CM = 0, WnR = 1
> 
> Cc: Mark Rutland <Mark.rutland@....com>
> Cc: Anshuman Khandual <anshuman.khandual@....com>
> Cc: James Morse <james.morse@....com>
> Signed-off-by: Miles Chen <miles.chen@...iatek.com>
> ---
>  arch/arm64/mm/fault.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index cfd65b63f36f..afb6041e25e6 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -86,8 +86,8 @@ static void mem_abort_decode(unsigned int esr)
>  	pr_alert("Mem abort info:\n");
>  
>  	pr_alert("  ESR = 0x%08x\n", esr);
> -	pr_alert("  Exception class = %s, IL = %u bits\n",
> -		 esr_get_class_string(esr),
> +	pr_alert("  EC = 0x%lx, Exception class = %s, IL = %u bits\n",
> +		 ESR_ELx_EC(esr), esr_get_class_string(esr),

Could we make this:

	pr_alert("  EC = 0x%02lx: %s, IL = %u bits\n",
		 ESR_ELx_EC(esr), esr_get_class_string(esr));

We don't need to spell out "Exception Class" if we say "EC", and we
should print the EC hex value with a consistent width as we do for the
ISS.

With that:

Acked-by: Mark Rutland <mark.rutland@....com>

Thanks,
Mark.