linux-kernel - Re: [PATCH] clk: aspeed: Add SDIO gate

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-Id: <20190807211541.5D6B0217D9@mail.kernel.org>
Date:   Wed, 07 Aug 2019 14:15:40 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Andrew Jeffery <andrew@...id.au>, linux-clk@...r.kernel.org
Cc:     Joel Stanley <joel@....id.au>, mturquette@...libre.com,
        ryanchen.aspeed@...il.com, linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        Andrew Jeffery <andrew@...id.au>
Subject: Re: [PATCH] clk: aspeed: Add SDIO gate

Quoting Andrew Jeffery (2019-07-10 07:10:09)
> From: Joel Stanley <joel@....id.au>
> 
> The clock divisor comes with an enable bit (gate). This was not
> implemented as we didn't have access to SD hardware when writing the
> driver. Now that we can test it, add the gate as a parent to the
> divisor.
> 
> There is no reason to expose the gate separately, so users will enable
> it by turning on the ASPEED_CLK_SDIO divisor.
> 
> Signed-off-by: Joel Stanley <joel@....id.au>
> [aj: Minor style cleanup]
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> ---

Applied to clk-next