linux-kernel - Re: [PATCH 7/8] mtd: spinand: micron: Fix read failure in Micron M70A flashes

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Message-ID: <20190807120537.733b6e6d@xps13>
Date:   Wed, 7 Aug 2019 12:05:37 +0200
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     shiva.linuxworks@...il.com
Cc:     Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Vignesh Raghavendra <vigneshr@...com>,
        Boris Brezillon <bbrezillon@...nel.org>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Frieder Schrempf <frieder.schrempf@...tron.de>,
        Shivamurthy Shastri <sshivamurthy@...ron.com>,
        linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Jeff Kletsky <git-commits@...ycomm.com>,
        Chuanhong Guo <gch981213@...il.com>,
        liaoweixiong <liaoweixiong@...winnertech.com>
Subject: Re: [PATCH 7/8] mtd: spinand: micron: Fix read failure in Micron
 M70A flashes

Hi Shiva,

shiva.linuxworks@...il.com wrote on Mon, 22 Jul 2019 07:56:20 +0200:

> From: Shivamurthy Shastri <sshivamurthy@...ron.com>
> 
> M70A series flashes by default enable continuous read feature (BIT0 in
> configuration register). This feature will not expose the ECC to host
> and causing read failure.

This is not readable enough, can you rephrase? Besides that you can add
my 

Reviewed-by: Miquel Raynal <miquel.raynal@...tlin.com>

> 
> Signed-off-by: Shivamurthy Shastri <sshivamurthy@...ron.com>
> ---
>  drivers/mtd/nand/spi/micron.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 6fde93ec23a1..1e28ea3d1362 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand)
>  	return 1;
>  }
>  
> +static int micron_spinand_init(struct spinand_device *spinand)
> +{
> +	/*
> +	 * Some of the Micron flashes enable this BIT by default,
> +	 * and there is a chance of read failure due to this.
> +	 */
> +	return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0);
> +}
> +
>  static void micron_fixup_param_page(struct spinand_device *spinand,
>  				    struct nand_onfi_params *p)
>  {
> @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand,
>  
>  static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
>  	.detect = micron_spinand_detect,
> +	.init = micron_spinand_init,
>  	.fixup_param_page = micron_fixup_param_page,
>  };
>  


Thanks,
Miquèl