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Message-ID: <20190809221052.GP31406@gate.crashing.org>
Date:   Fri, 9 Aug 2019 17:10:52 -0500
From:   Segher Boessenkool <segher@...nel.crashing.org>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Christophe Leroy <christophe.leroy@....fr>,
        clang-built-linux <clang-built-linux@...glegroups.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
        Paul Mackerras <paulus@...ba.org>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        kbuild test robot <lkp@...el.com>,
        Nathan Chancellor <natechancellor@...il.com>,
        Michael Ellerman <mpe@...erman.id.au>,
        Nick Desaulniers <ndesaulniers@...gle.com>
Subject: Re: [PATCH] powerpc: fix inline asm constraints for dcbz

On Fri, Aug 09, 2019 at 10:12:56PM +0200, Arnd Bergmann wrote:
> @@ -106,7 +106,7 @@ static inline u##size name(const volatile u##size
> __iomem *addr)    \
>  {                                                                      \
>         u##size ret;                                                    \
>         __asm__ __volatile__("sync;"#insn" %0,%y1;twi 0,%0,0;isync"     \
> -               : "=r" (ret) : "Z" (*addr) : "memory");                 \
> +               : "=r" (ret) : "m" (*addr) : "memory");                 \
>         return ret;                                                     \
>  }

That will no longer compile something like
  u8 *p;
  u16 x = in_le16(p + 12);
(you'll get something like "invalid %y value, try using the 'Z' constraint").

So then you remove the %y, but that makes you get something like
  sync;lhbrx 3,12(3);twi 0,3,0;isync
which is completely wrong.


Segher

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