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Message-ID: <4e33bad9-8d5a-dcd7-c75e-db5843c9be4a@gmail.com>
Date: Fri, 9 Aug 2019 15:17:25 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Sowjanya Komatineni <skomatineni@...dia.com>,
thierry.reding@...il.com, jonathanh@...dia.com, tglx@...utronix.de,
jason@...edaemon.net, marc.zyngier@....com,
linus.walleij@...aro.org, stefan@...er.ch, mark.rutland@....com
Cc: pdeschrijver@...dia.com, pgaikwad@...dia.com, sboyd@...nel.org,
linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
jckuo@...dia.com, josephl@...dia.com, talho@...dia.com,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
mperttunen@...dia.com, spatra@...dia.com, robh+dt@...nel.org,
devicetree@...r.kernel.org, rjw@...ysocki.net,
viresh.kumar@...aro.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH v8 10/21] clk: tegra: clk-super: Add restore-context
support
09.08.2019 2:46, Sowjanya Komatineni пишет:
> This patch implements restore_context for clk_super_mux and clk_super.
>
> During system supend, core power goes off the and context of Tegra
> CAR registers is lost.
>
> So on system resume, context of super clock registers are restored
> to have them in same state as before suspend.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
> ---
> drivers/clk/tegra/clk-super.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c
> index e2a1e95a8db7..74c9e913e41c 100644
> --- a/drivers/clk/tegra/clk-super.c
> +++ b/drivers/clk/tegra/clk-super.c
> @@ -124,9 +124,18 @@ static int clk_super_set_parent(struct clk_hw *hw, u8 index)
> return err;
> }
>
> +static void clk_super_mux_restore_context(struct clk_hw *hw)
> +{
> + struct clk_hw *parent = clk_hw_get_parent(hw);
> + int parent_id = clk_hw_get_parent_index(hw, parent);
> +
> + clk_super_set_parent(hw, parent_id);
All Super clocks have a divider, including the "MUX". Thus I'm wondering
if there is a chance that divider's configuration may differ on resume
from what it was on suspend.
> +}
> +
> static const struct clk_ops tegra_clk_super_mux_ops = {
> .get_parent = clk_super_get_parent,
> .set_parent = clk_super_set_parent,
> + .restore_context = clk_super_mux_restore_context,
> };
>
> static long clk_super_round_rate(struct clk_hw *hw, unsigned long rate,
> @@ -162,12 +171,24 @@ static int clk_super_set_rate(struct clk_hw *hw, unsigned long rate,
> return super->div_ops->set_rate(div_hw, rate, parent_rate);
> }
>
> +static void clk_super_restore_context(struct clk_hw *hw)
> +{
> + struct tegra_clk_super_mux *super = to_clk_super_mux(hw);
> + struct clk_hw *div_hw = &super->frac_div.hw;
> + struct clk_hw *parent = clk_hw_get_parent(hw);
> + int parent_id = clk_hw_get_parent_index(hw, parent);
> +
> + super->div_ops->restore_context(div_hw);
> + clk_super_set_parent(hw, parent_id);
> +}
> +
> const struct clk_ops tegra_clk_super_ops = {
> .get_parent = clk_super_get_parent,
> .set_parent = clk_super_set_parent,
> .set_rate = clk_super_set_rate,
> .round_rate = clk_super_round_rate,
> .recalc_rate = clk_super_recalc_rate,
> + .restore_context = clk_super_restore_context,
> };
>
> struct clk *tegra_clk_register_super_mux(const char *name,
>
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