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Message-ID: <b5bce55e4c19e0cd0b848f14c413586ef5c53514.camel@analog.com>
Date: Fri, 9 Aug 2019 12:32:59 +0000
From: "Ardelean, Alexandru" <alexandru.Ardelean@...log.com>
To: "davem@...emloft.net" <davem@...emloft.net>
CC: "andrew@...n.ch" <andrew@...n.ch>,
"hkallweit1@...il.com" <hkallweit1@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"f.fainelli@...il.com" <f.fainelli@...il.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
Subject: Re: [PATCH v2 00/15] net: phy: adin: add support for Analog Devices
PHYs
On Thu, 2019-08-08 at 11:24 -0700, David Miller wrote:
> [External]
>
> From: Alexandru Ardelean <alexandru.ardelean@...log.com>
> Date: Thu, 8 Aug 2019 15:30:11 +0300
>
> > This changeset adds support for Analog Devices Industrial Ethernet PHYs.
> > Particularly the PHYs this driver adds support for:
> > * ADIN1200 - Robust, Industrial, Low Power 10/100 Ethernet PHY
> > * ADIN1300 - Robust, Industrial, Low Latency 10/100/1000 Gigabit
> > Ethernet PHY
> >
> > The 2 chips are pin & register compatible with one another. The main
> > difference being that ADIN1200 doesn't operate in gigabit mode.
> >
> > The chips can be operated by the Generic PHY driver as well via the
> > standard IEEE PHY registers (0x0000 - 0x000F) which are supported by the
> > kernel as well. This assumes that configuration of the PHY has been done
> > completely in HW, according to spec, i.e. no extra SW configuration
> > required.
> >
> > This changeset also implements the ability to configure the chips via SW
> > registers.
> >
> > Datasheets:
> > https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1300.pdf
> > https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1200.pdf
> >
> > Signed-off-by: Alexandru Ardelean <alexandru.ardelean@...log.com>
>
> I think, at a minimum, the c22 vs. c45 issues need to be discussed more
> and even if no code changes occur there is definitely some adjustments
> and clairifications that need to occur on this issue in the commit
> messages and/or documentation.
I guess I'll drop/defer some of the C45 stuff for now.
I don't know how decisions were done when the chips were created.
I am told that C45 works, but I may need to find out more on my end, since I am also new to/unclear on some items.
[My personal feeling about this]
I think there are some confusions [internally on our side] about what C45 is and how it should be done.
I guess it's part of developing knowledge/skills for developing PHYs as a company.
There's plenty of knowledge for how to do the electrical, low-power-stuff, etc, and even the datasheet sometimes feels
like it's for an ADC/DAC.
[My personal feeling about this]
Thanks
Alex
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