[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <57c16c37-c81c-a935-6b8f-efd41657aaad@silicom-usa.com>
Date: Fri, 9 Aug 2019 14:13:31 +0000
From: Stephen Douthit <stephend@...icom-usa.com>
To: "Luck, Tony" <tony.luck@...el.com>, Borislav Petkov <bp@...en8.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
James Morse <james.morse@....com>
CC: "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] EDAC, pnd2: Fix ioremap() size in dnv_rd_reg() from 64K
-> 32K
On 8/8/19 5:05 PM, Luck, Tony wrote:
> - base = ioremap((resource_size_t)addr, 0x10000);
> + base = ioremap((resource_size_t)addr, 0x8000);
>
> Changing one magic value for another. :-(
Ok, I'll give it a name.
> Do different BIOS do different things? I don't recall seeing this error
> (but perhaps I missed it, or perhaps the kernel has added better checks).
Sure, depending on where a BIOS locates MMIO resources the reported
reserved ranges will vary. Normally those resources are packed by size
so any changes in the installed/enabled device list can change the
layout of the MMIO reserved regions as well.
The BIOS could also choose to report adjacent MMIO resources as one
larger reserved region.
> If this number is at the whim of the BIOS, is there some way to
> figure out what is the right value on a specific implementation?
Digging back though the EDS (Intel Doc #558579) I found that there are
two sizes we need to handle. If we're reading via the memory controller
hub that BAR is 32KB per section 44.2.7 of the EDS.
All sideband ports are 64KB, I'll resubmit taking that into account.
Powered by blists - more mailing lists