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Message-ID: <20190809144252.GD864@valkosipuli.retiisi.org.uk>
Date: Fri, 9 Aug 2019 17:42:52 +0300
From: Sakari Ailus <sakari.ailus@....fi>
To: Luis Oliveira <Luis.Oliveira@...opsys.com>
Cc: mchehab@...nel.org, davem@...emloft.net,
gregkh@...uxfoundation.org, Jonathan.Cameron@...wei.com,
robh@...nel.org, nicolas.ferre@...rochip.com,
paulmck@...ux.ibm.com, mark.rutland@....com, kishon@...com,
devicetree@...r.kernel.org, linux-media@...r.kernel.org,
linux-kernel@...r.kernel.org, Joao.Pinto@...opsys.com
Subject: Re: [v4 4/6] dt-bindings: phy: Document the Synopsys MIPI DPHY Rx
bindings
Hi Luis,
On Tue, Jun 11, 2019 at 09:20:53PM +0200, Luis Oliveira wrote:
> Add device-tree bindings documentation for SNPS DesignWare MIPI D-PHY in
> RX mode.
>
> Signed-off-by: Luis Oliveira <luis.oliveira@...opsys.com>
> ---
> Changelog
> v3-v4
> - @Laurent I know I told you I could remove the snps,dphy-frequency on V3 but
> it is really useful for me here. I removed all other the proprietary
> properties except this one. Do you still think it must be removed?
Yes. DT is the wrong place for runtime configuration. You get that
information using the V4L2_CID_LINK_FREQ control on the upstream
sub-device.
> - Frequency units @Rob
>
> .../devicetree/bindings/phy/snps,dw-dphy-rx.txt | 29 ++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> new file mode 100644
> index 0000000..50603e6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> @@ -0,0 +1,29 @@
> +Synopsys DesignWare MIPI Rx D-PHY block details
> +
> +Description
> +-----------
> +
> +The Synopsys MIPI D-PHY controller supports MIPI-DPHY in receiver mode.
> +Please refer to phy-bindings.txt for more information.
> +
> +Required properties:
> +- compatible : Shall be "snps,dw-dphy-rx".
> +- #phy-cells : Must be 1.
> +- bus-width : Size of the test interface data bus (8 bits->8 or
> + 12bits->12).
Hmm. This seems like runtime configuration as well.
> +- snps,dphy-frequency : Frequency at which D-PHY should start, configurable.
> + Check Synopsys databook. (-kHz)
> +- reg : Test interface register. This correspondes to the
> + physical base address of the controller and size of
> + the device memory mapped registers; Check Synopsys
> + databook.
Is this just for testing purposes or not?
> +
> +Example:
> +
> + mipi_dphy_rx1: dphy@...003040 {
> + compatible = "snps,dw-dphy-rx";
> + #phy-cells = <1>;
> + bus-width = <12>;
> + snps,dphy-frequency = <300000>;
> + reg = <0xd0003040 0x20>;
> + };
--
Regards,
Sakari Ailus
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