linux-kernel - Re: [PATCH v3 14/21] ARM: dts: imx6ull-colibri: Add sleep mode to fec

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Date:   Fri, 9 Aug 2019 15:38:58 +0000
From:   Marcel Ziswiler <marcel.ziswiler@...adex.com>
To:     Max Krummenacher <max.krummenacher@...adex.com>,
        "stefan@...er.ch" <stefan@...er.ch>,
        Philippe Schenker <philippe.schenker@...adex.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "michal.vokac@...ft.com" <michal.vokac@...ft.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "festevam@...il.com" <festevam@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-imx@....com" <linux-imx@....com>
Subject: Re: [PATCH v3 14/21] ARM: dts: imx6ull-colibri: Add sleep mode to fec

On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> Do not change the clock as the power for this phy is switched
> with that clock.
> 
> Signed-off-by: Philippe Schenker <philippe.schenker@...adex.com>

Acked-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>

> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index d56728f03c35..1019ce69a242 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -62,8 +62,9 @@
>  };
>  
>  &fec2 {
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "sleep";
>  	pinctrl-0 = <&pinctrl_enet2>;
> +	pinctrl-1 = <&pinctrl_enet2_sleep>;
>  	phy-mode = "rmii";
>  	phy-handle = <&ethphy1>;
>  	status = "okay";
> @@ -220,6 +221,21 @@
>  		>;
>  	};
>  
> +	pinctrl_enet2_sleep: enet2sleepgrp {
> +		fsl,pins = <
> +			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	0x0
> +			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	0x0
> +			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x0
> +			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x0
> +			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x0
> +			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	0x0
> +			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x400
> 1b031
> +			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x0
> +			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x0
> +			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	0x0
> +		>;
> +	};
> +
>  	pinctrl_ecspi1_cs: ecspi1-cs-grp {
>  		fsl,pins = <
>  			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x000a0