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Message-ID: <f9316727-607b-7c05-1c47-05319b3cdecf@devtank.co.uk>
Date: Fri, 9 Aug 2019 17:28:42 +0100
From: Joe Burmeister <joe.burmeister@...tank.co.uk>
To: Mark Rutland <mark.rutland@....com>
Cc: Rob Herring <robh+dt@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
YueHaibing <yuehaibing@...wei.com>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] Add optional chip erase functionality to AT25 EEPROM
driver.
Hi Mark,
On 09/08/2019 14:54, Mark Rutland wrote:
> On Fri, Aug 09, 2019 at 01:53:55PM +0100, Joe Burmeister wrote:
>> Many, though not all, AT25s have an instruction for chip erase.
>> If there is one in the datasheet, it can be added to device tree.
>> Erase can then be done in userspace via the sysfs API with a new
>> "erase" device attribute. This matches the eeprom_93xx46 driver's
>> "erase".
>>
>> Signed-off-by: Joe Burmeister <joe.burmeister@...tank.co.uk>
>> ---
>> .../devicetree/bindings/eeprom/at25.txt | 2 +
>> drivers/misc/eeprom/at25.c | 83 ++++++++++++++++++-
>> 2 files changed, 82 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt
>> index b3bde97dc199..c65d11e14c7a 100644
>> --- a/Documentation/devicetree/bindings/eeprom/at25.txt
>> +++ b/Documentation/devicetree/bindings/eeprom/at25.txt
>> @@ -19,6 +19,7 @@ Optional properties:
>> - spi-cpha : SPI shifted clock phase, as per spi-bus bindings.
>> - spi-cpol : SPI inverse clock polarity, as per spi-bus bindings.
>> - read-only : this parameter-less property disables writes to the eeprom
>> +- chip_erase_instruction : Chip erase instruction for this AT25, often 0xc7 or 0x62.
> This should be using '-' rather than '_', as per general DT conventions
> and as with the existing properties.
>
>> Obsolete legacy properties can be used in place of "size", "pagesize",
>> "address-width", and "read-only":
>> @@ -39,4 +40,5 @@ Example:
>> pagesize = <64>;
>> size = <32768>;
>> address-width = <16>;
>> + chip_erase_instruction = <0x62>;
> [...]
>
>> + /* Optional chip erase instruction */
>> + device_property_read_u8(&spi->dev, "chip_erase_instruction", &at25->erase_instr);
> This will not behave as you expect, since you didn't mark the property as
> 8-bits.
Rats, I forgot to update the documentation. In my device tree I have
already found the /bit 8/ bit.
> Read this as a u32 into the existing val temporary variable, as is done
> for pagesize. You can add a warnign if it's out-of-range.
32bit would certainly read better in the device tree. I'll do that.
> Thanks,
> Mark.
Cheers,
Joe
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