linux-kernel - Re: [linux-sunxi] [PATCH v8 1/4] arm64: dts: allwinner: orange-pi-3: Enable ethernet

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Message-ID: <CAGb2v66+L6_QrL-05fLHQxqavBAmP-pEFp9RWT5XeTQ2rpGa3w@mail.gmail.com>
Date:   Mon, 12 Aug 2019 17:17:48 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Ondřej Jirman <megous@...ous.com>
Cc:     linux-sunxi <linux-sunxi@...glegroups.com>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Rob Herring <robh+dt@...nel.org>,
        Jernej Škrabec <jernej.skrabec@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Mark Rutland <mark.rutland@....com>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [linux-sunxi] [PATCH v8 1/4] arm64: dts: allwinner: orange-pi-3:
 Enable ethernet

On Tue, Aug 6, 2019 at 11:57 PM <megous@...ous.com> wrote:
>
> From: Ondrej Jirman <megous@...ous.com>
>
> Orange Pi 3 has two regulators that power the Realtek RTL8211E. According
> to the phy datasheet, both regulators need to be enabled at the same time,
> but we can only specify a single phy-supply in the DT.
>
> This can be achieved by making one regulator depedning on the other via
> vin-supply. While it's not a technically correct description of the
> hardware, it achieves the purpose.
>
> All values of RX/TX delay were tested exhaustively and a middle one of the
> working values was chosen.
>
> Signed-off-by: Ondrej Jirman <megous@...ous.com>
> ---
>  .../dts/allwinner/sun50i-h6-orangepi-3.dts    | 44 +++++++++++++++++++
>  1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
> index 17d496990108..2c6807b74ff6 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
> @@ -15,6 +15,7 @@
>
>         aliases {
>                 serial0 = &uart0;
> +               ethernet0 = &emac;
>         };
>
>         chosen {
> @@ -44,6 +45,27 @@
>                 regulator-max-microvolt = <5000000>;
>                 regulator-always-on;
>         };
> +
> +       /*
> +        * The board uses 2.5V RGMII signalling. Power sequence to enable
> +        * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails
> +        * at the same time and to wait 100ms.
> +        */
> +       reg_gmac_2v5: gmac-2v5 {
> +               compatible = "regulator-fixed";
> +               regulator-name = "gmac-2v5";
> +               regulator-min-microvolt = <2500000>;
> +               regulator-max-microvolt = <2500000>;
> +               startup-delay-us = <100000>;
> +               enable-active-high;
> +               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> +
> +               /* The real parent of gmac-2v5 is reg_vcc5v, but we need to
> +                * enable two regulators to power the phy. This is one way
> +                * to achieve that.
> +                */
> +               vin-supply = <&reg_aldo2>; /* GMAC-3V */
> +       };

The RTL8211E datasheet I have says:

    2.5V (or 1.8/1.5V) RGMII power should be risen simultaneously or slightly
    earlier than 3.3V power. Rising 2.5V (or 1.8/1.5V) power later than 3.3V
    power may lead to errors.

Since you can't reverse the parent relationship in your patch, maybe it's
time to add a phy-io-supply property?

It also says the rise time for 3.3V must be between 1ms and 100ms. However
the PMIC doesn't support voltage ramp control for the LDOs, nor does it list
the ramp rate.

ChenYu

>  };
>
>  &cpu0 {
> @@ -58,6 +80,28 @@
>         status = "okay";
>  };
>
> +&emac {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ext_rgmii_pins>;
> +       phy-mode = "rgmii";
> +       phy-handle = <&ext_rgmii_phy>;
> +       phy-supply = <&reg_gmac_2v5>;
> +       allwinner,rx-delay-ps = <1500>;
> +       allwinner,tx-delay-ps = <700>;
> +       status = "okay";
> +};
> +
> +&mdio {
> +       ext_rgmii_phy: ethernet-phy@1 {
> +               compatible = "ethernet-phy-ieee802.3-c22";
> +               reg = <1>;
> +
> +               reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
> +               reset-assert-us = <15000>;
> +               reset-deassert-us = <40000>;
> +       };
> +};
> +
>  &mmc0 {
>         vmmc-supply = <&reg_cldo1>;
>         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
> --
> 2.22.0
>
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