lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 13 Aug 2019 16:48:56 +0000
From:   "Chocron, Jonathan" <jonnyc@...zon.com>
To:     "robh@...nel.org" <robh@...nel.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        "Woodhouse, David" <dwmw@...zon.co.uk>,
        "Hanoch, Uri" <hanochu@...zon.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
        "Wasserstrom, Barak" <barakw@...zon.com>,
        "Saidi, Ali" <alisaidi@...zon.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "Hawa, Hanna" <hhhawa@...zon.com>,
        "Shenhar, Talel" <talel@...zon.com>,
        "Krupnik, Ronen" <ronenk@...zon.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "benh@...nel.crashing.org" <benh@...nel.crashing.org>,
        "Chocron, Jonathan" <jonnyc@...zon.com>
Subject: Re: [PATCH v3 5/8] dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe
 host bridge binding

On Tue, 2019-08-13 at 09:30 -0600, Rob Herring wrote:
> On Tue, Jul 23, 2019 at 12:27:08PM +0300, Jonathan Chocron wrote:
> > Document Amazon's Annapurna Labs PCIe host bridge.
> > 
> > Signed-off-by: Jonathan Chocron <jonnyc@...zon.com>
> > ---
> >  .../devicetree/bindings/pci/pcie-al.txt       | 45
> > +++++++++++++++++++
> >  MAINTAINERS                                   |  3 +-
> >  2 files changed, 47 insertions(+), 1 deletion(-)
> >  create mode 100644 Documentation/devicetree/bindings/pci/pcie-
> > al.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/pcie-al.txt
> > b/Documentation/devicetree/bindings/pci/pcie-al.txt
> > new file mode 100644
> > index 000000000000..89876190eb5a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/pcie-al.txt
> > @@ -0,0 +1,45 @@
> > +* Amazon Annapurna Labs PCIe host bridge
> > +
> > +Amazon's Annapurna Labs PCIe Host Controller is based on the
> > Synopsys DesignWare
> > +PCI core.
> > +It shares common functions with the PCIe DesignWare core driver
> > and inherits
> 
> Driver details are irrelevant to the binding.
> 
Will remove.

> > +common properties defined in
> > Documentation/devicetree/bindings/pci/designware-pcie.txt.
> > +Properties of the host controller node that differ from it are:
> > +
> > +- compatible:
> > +	Usage: required
> > +	Value type: <stringlist>
> > +	Definition: Value should contain
> > +			- "amazon,al-pcie"
> 
> Needs to be SoC specific.
> 
I'm not sure I follow. The PCIe controller can be implemented in
different SoCs. Could you please clarify?

> > +
> > +- reg:
> > +	Usage: required
> > +	Value type: <prop-encoded-array>
> > +	Definition: Register ranges as listed in the reg-names property
> > +
> > +- reg-names:
> > +	Usage: required
> > +	Value type: <stringlist>
> > +	Definition: Must include the following entries
> > +			- "config"	PCIe ECAM space
> > +			- "controller"	AL proprietary registers
> > +			- "dbi"		Designware PCIe registers
> > +
> > +Example:
> > +
> > +	pcie-external0: pcie@...00000 {
> > +		compatible = "amazon,al-pcie";
> > +		reg = <0x0 0xfb600000 0x0 0x00100000
> > +		       0x0 0xfd800000 0x0 0x00010000
> > +		       0x0 0xfd810000 0x0 0x00001000>;
> > +		reg-names = "config", "controller", "dbi";
> > +		bus-range = <0 255>;
> > +		device_type = "pci";
> > +		#address-cells = <3>;
> > +		#size-cells = <2>;
> > +		#interrupt-cells = <1>;
> > +		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > +		interrupt-map-mask = <0x00 0 0 7>;
> > +		interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41
> > IRQ_TYPE_LEVEL_HIGH>; /* INTa */
> > +		ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0
> > 0x07ff0000>;
> > +	};
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 5a6137df3f0e..29cca14a05a6 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -12201,10 +12201,11 @@ T:	git
> > git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/
> >  S:	Supported
> >  F:	drivers/pci/controller/
> >  
> > -PCIE DRIVER FOR ANNAPURNA LABS
> > +PCIE DRIVER FOR AMAZON ANNAPURNA LABS
> >  M:	Jonathan Chocron <jonnyc@...zon.com>
> >  L:	linux-pci@...r.kernel.org
> >  S:	Maintained
> > +F:	Documentation/devicetree/bindings/pci/pcie-al.txt
> >  F:	drivers/pci/controller/dwc/pcie-al.c
> >  
> >  PCIE DRIVER FOR AMLOGIC MESON
> > -- 
> > 2.17.1
> > 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ