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Message-Id: <20190813205359.12196-4-yu-cheng.yu@intel.com>
Date: Tue, 13 Aug 2019 13:53:48 -0700
From: Yu-cheng Yu <yu-cheng.yu@...el.com>
To: x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-mm@...ck.org,
linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...capital.net>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
Jonathan Corbet <corbet@....net>,
Kees Cook <keescook@...omium.org>,
Mike Kravetz <mike.kravetz@...cle.com>,
Nadav Amit <nadav.amit@...il.com>,
Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
Peter Zijlstra <peterz@...radead.org>,
Randy Dunlap <rdunlap@...radead.org>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
Dave Martin <Dave.Martin@....com>
Cc: Yu-cheng Yu <yu-cheng.yu@...el.com>
Subject: [PATCH v8 03/14] x86/cet/ibt: Handle signals for end branch
Restore end branch tracking setting from thread header.
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@...el.com>
---
arch/x86/kernel/cet.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c
index 505a69f476e1..db542bd423cc 100644
--- a/arch/x86/kernel/cet.c
+++ b/arch/x86/kernel/cet.c
@@ -281,6 +281,15 @@ int cet_restore_signal(bool ia32, struct sc_ext *sc_ext)
msr_ia32_u_cet |= MSR_IA32_CET_SHSTK_EN;
}
+ if (current->thread.cet.ibt_enabled) {
+ if (current->thread.cet.ibt_bitmap_used)
+ msr_ia32_u_cet |= (IBT_BITMAP_ADDR |
+ MSR_IA32_CET_LEG_IW_EN);
+
+ msr_ia32_u_cet |= (MSR_IA32_CET_ENDBR_EN |
+ MSR_IA32_CET_NO_TRACK_EN);
+ }
+
wrmsrl(MSR_IA32_PL3_SSP, new_ssp);
wrmsrl(MSR_IA32_U_CET, msr_ia32_u_cet);
return 0;
@@ -321,6 +330,15 @@ int cet_setup_signal(bool ia32, unsigned long rstor_addr, struct sc_ext *sc_ext)
sc_ext->ssp = new_ssp;
}
+ if (current->thread.cet.ibt_enabled) {
+ if (current->thread.cet.ibt_bitmap_used)
+ msr_ia32_u_cet |= (IBT_BITMAP_ADDR |
+ MSR_IA32_CET_LEG_IW_EN);
+
+ msr_ia32_u_cet |= (MSR_IA32_CET_ENDBR_EN |
+ MSR_IA32_CET_NO_TRACK_EN);
+ }
+
modify_fpu_regs_begin();
wrmsrl(MSR_IA32_PL3_SSP, ssp);
wrmsrl(MSR_IA32_U_CET, msr_ia32_u_cet);
--
2.17.1
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